Senior AI Accelerator Architect: Performance & Power

MaC VC; Santa Clara (CA); On-site; USD 127,000 - 218,000; Full time

Benefits offered by this job

Annual bonus

RSU grants

Benefits package

Job summary

Qualcomm Technologies, Inc. is seeking AI Accelerator Architecture Engineers to advance hardware and software design for scalable AI training and inference systems. You will explore flexible computational blocks, memory subsystems, and scale-out architectures to meet demanding ML workloads.

The role requires strong hardware modeling, knowledge of GPUs/accelerators, and experience with ML frameworks. Collaboration across teams is essential to deliver power-efficient, high-performance solutions.

Qualifications

• Master's degree or PhD with relevant hardware research experience.
• 3+ years hardware engineering experience in GPUs/accelerators for AI training.
• Deep knowledge of NVIDIA/AMD GPU capabilities and architectures.
• Familiarity with LLM architectures and HW implications.

Responsibilities

• Understand ML network trends and their impact on SW/HW design.
• Engage with customers to determine hardware requirements for AI training systems.
• Analyze current accelerator and GPU architectures and propose enhancements.
• Design flexible computational blocks for various datatypes and precisions.

Skills

Computer architecture

Digital circuits

Hardware simulators

Communication protocols

NoC designs

Memory technologies

Performance modeling

C++ programming

Python programming

LLM training systems

Education

Bachelor's degree in CS/Engineering/IS

Master's degree in CS/Engineering/IS

PhD in CS/Engineering/IS

Tools

TensorFlow

PyTorch

DeepSpeed

NVX/NVL frameworks

Job description

Qualcomm Technologies, Inc. is seeking AI Accelerator Architecture Engineers to advance hardware and software design for scalable AI training and inference systems. You will explore flexible computational blocks, memory subsystems, and scale-out architectures to meet demanding ML workloads.

The role requires strong hardware modeling, knowledge of GPUs/accelerators, and experience with ML frameworks. Collaboration across teams is essential to deliver power-efficient, high-performance solutions.