AI Systems Hardware Engineer: Optimize SoC AI Workloads

Qualcomm; Santa Clara (CA); On-site; USD 164,000 - 246,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking an engineer to optimize mapping of AI workloads to next‑gen accelerator systems. You will analyze system bottlenecks, explore power/performance/TCO trade‑offs, and map workloads across SoC, memory and networking.

The role requires collaboration with Architecture, product, and SW teams to define an implementation strategy meeting system requirements. Preferred locations include San Diego, CA, with Santa Clara or Austin as alternatives.

Qualifications

• Bachelor's degree with 6+ years of ASIC design/verification/validation experience.
• Master's degree with 5+ years of ASIC design/verification/validation experience.
• PhD with 4+ years of ASIC design/verification/validation experience.

Skills

ASIC design

Python scripting

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Job description

Qualcomm Technologies, Inc. is seeking an engineer to optimize mapping of AI workloads to next‑gen accelerator systems. You will analyze system bottlenecks, explore power/performance/TCO trade‑offs, and map workloads across SoC, memory and networking.

The role requires collaboration with Architecture, product, and SW teams to define an implementation strategy meeting system requirements. Preferred locations include San Diego, CA, with Santa Clara or Austin as alternatives.