Semiconductor Systems Operations Engineer

Massachusetts Institute of Technology; Cambridge (MA); On-site; USD 70,000 - 110,000; Full time

Job summary

MIT.nano in Cambridge, MA is seeking an Operations Engineer to oversee the operation, training and maintenance of semiconductor research equipment within the MIT.nano facility, including lithography, etch and deposition systems. The role requires knowledge of lithography, etch and deposition techniques, proper chemical handling, safety and storage, and ongoing equipment support.

The engineer will contribute to maintaining equipment performance, conducting routine servicing, and coordinating with

Qualifications

• Experience operating semiconductor research equipment.
• Knowledge of lithography, etch and deposition techniques.
• Ability to handle chemicals safely and maintain proper storage.

Responsibilities

• Operate lithography and processing equipment within MIT.nano.
• Provide training and maintenance for research equipment.
• Support system maintenance and routine service activities.

Skills

Lithography

Etch techniques

Deposition techniques

Chemical handling

Safety and storage

Maintenance and service

Tools

RIE

PVD

CVD

Wet processing stations

Thermal processing systems

Job description

MIT.nano in Cambridge, MA is seeking an Operations Engineer to oversee the operation, training and maintenance of semiconductor research equipment within the MIT.nano facility, including lithography, etch and deposition systems. The role requires knowledge of lithography, etch and deposition techniques, proper chemical handling, safety and storage, and ongoing equipment support.

The engineer will contribute to maintaining equipment performance, conducting routine servicing, and coordinating with