Semiconductor IC Packaging Engineer - Wafer Level Packaging

Marvell Semiconductor, Inc.; California, Santa Clara (MO, CA); On-site; USD 115,000 - 174,000; Full time

Job summary

An innovative firm is seeking a passionate engineer to drive semiconductor package development from concept to production. This role involves defining package guidelines, managing technical assessments, and collaborating with cross-functional teams. Ideal candidates will have a strong background in semiconductor wafer level packaging and a desire to contribute to cutting-edge technology in AI-driven cloud data centers. With a focus on quality and reliability, this position offers a unique opportunity to make a significant impact in the industry while enjoying a comprehensive benefits package.

Benefits

Flexible Time Off

401k

Year-End Shutdown

Floating Holidays

Paid Time Off to Volunteer

Qualifications

• 5-10 years of experience in semiconductor wafer level packaging.
• Good knowledge of design rules and materials used in packaging.

Responsibilities

• Define package guidelines and implement in product design.
• Manage OSAT on package technical risk assessment and design review.

Skills

Semiconductor Wafer Level Packaging

Design Rule Knowledge

Process and Materials Knowledge

Communication Skills

Program Management Skills

Education

BS in Mechanical Engineering

MS in Mechanical Engineering

PhD in Mechanical Engineering

Tools

KLayout

Cadence APD

AutoCAD

Job description

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell's semiconductor solutions are the essential building blocks of the accelerated data infrastructure that connects to the world. Marvell has the extraordinary opportunities across Data Center & AI, Automotive, Enterprise, Storage and Carrier architectures where we deliver our strong product portfolios to the market.

The package engineering team drives semiconductor IC package development from concept to mass production. Here you can brainstorm, excel, innovate, transform for the expansion of AI-driven cloud data centers for a once-in-a-lifetime opportunity. The focus of NPI is to take a concept of a semiconductor package solution and transfer it to a final product with consideration of performance, cost, reliability, yield and supply resilience. You will have the opportunity to support the cutting-edge package solutions in all product portfolios.

What You Can Expect

• Define package guidelines and drive implementation in product design, focusing on FC bumping, RDL and wafer level package.

• Manage and drive OSAT on package technical risk assessment, design review, BOM and process selection, package characterization and qualification.

• Fully in charge of NPI package related tasks, starting from package definition, first sample delivery, package qualification and production ramp.

• Work closely with internal cross functional teams and lead package development of NPI from concept to production.

• Work with QA, OSAT/substrate suppliers to resolve package related quality/reliability issues.

• Work with procurement and suppliers on package cost analysis.

What We're Looking For

• Experiences in semiconductor wafer level packaging is a must. Education: BS, MS or PhD in ME, MSE, EE or related engineering fields.

  • BS with 5-10 years of experience

  • Prefer MS/PhD with 3+ years of experience

• Have passion for work; self-motivated, eager to learn and grow; be responsible and accountable; and result driven.

• The ideal candidate has good knowledge of design rule, process, and materials used in FC bumping and wafer level packaging.

• Good understanding of semiconductor IC packaging assembly processes, materials, reliability standards and failure analysis techniques.

• Experiences in Si photonics packaging is a plus.

• Basic KLayout, Cadence APD and AutoCAD skills

• Good communication skill is essential to work well with internal cross functional teams and external suppliers.

• Good program management skills.

• Ability to work independently with minimum supervision.

Expected Base Pay Range (USD)

115,790 - 173,500, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [e-mail].

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