SatCom, ISR & Space Payload Architect

Altera; San Jose (CA); On-site; USD 169,000 - 244,700; Full time

Job summary

Altera in San Jose, California, is seeking a SatCom, ISR, and Space Payload Architect to lead technical engagements and develop solutions for next-generation space and defense platforms. The candidate will architect FPGA-based solutions focusing on satellite communications and ISR applications.

Minimum requirements include a Bachelor’s degree in Electrical Engineering, 8+ years of relevant experience, and a strong background in DSP for communications. The position offers a competitive salary of $169.0K - $244.7K USD.

Qualifications

• 8+ years of experience in satellite communications, ISR systems, or space payload design.
• Experience with communication protocols and standards (e.g., DVB-S2/S2X, CCSDS).
• Familiarity with high-speed data interfaces.

Responsibilities

• Define system architectures for SatCom, ISR, and space payload applications.
• Collaborate with hardware, software, and product teams.
• Develop reference architectures and technical collateral for aerospace and defense customers.

Skills

Digital signal processing (DSP)

FPGA design (VHDL/Verilog/SystemVerilog)

Satellite communications

RF systems

Education

Bachelor's degree in Electrical Engineering

Master's degree preferred

Tools

FPGA technology

Communication protocols (DVB-S2/S2X, CCSDS)

High-speed data interfaces (PCIe, Ethernet, JESD204)

Job description

Job Description

Altera is seeking a SatCom, ISR, and Space Payload Architect to lead technical engagements and solution development for next-generation space and defense platforms. This role will focus on architecting FPGA-based solutions for satellite communications, intelligence/surveillance/reconnaissance (ISR), and onboard space payload processing. Candidates must be located within a commutable distance of the Altera New Hampshire office, once the office is established.

Key Responsibilities

• Define system architectures for SatCom, ISR, and space payload applications leveraging Altera FPGA technologies
• Partner with customers and internal teams to translate mission requirements into scalable, high-performance solutions
• Design and optimize signal processing pipelines for applications such as modulation/demodulation, channelization, encryption, and image/sensor processing
• Drive adoption of FPGA-based acceleration for onboard processing, including real-time and edge compute in space environments
• Collaborate with hardware, software, and product teams to influence roadmap and deliver optimized solutions
• Support system integration across RF front-end, digital processing, and high-speed interconnects
• Provide technical leadership across design, verification, and deployment phases
• Develop reference architectures, white papers, and technical collateral for aerospace and defense customers

$169.0K - $244.7K USD

We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.

Qualifications

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field; Master’s preferred
• 8+ years of experience in satellite communications, ISR systems, or space payload design
• Strong background in digital signal processing (DSP) for communications or sensing systems
• Hands-on experience with FPGA design (VHDL/Verilog/SystemVerilog, RTL development)
• Experience with communication protocols and standards (e.g., DVB-S2/S2X, CCSDS, LDPC, etc.)
• Familiarity with high-speed data interfaces (e.g., PCIe, Ethernet, JESD204)
• Experience with system-level design in constrained environments (power, thermal, radiation)

Security Clearance Requirement

This position may involve work on U.S. Government contracts that require access to controlled or classified information. Accordingly, all applicants must be eligible to obtain and maintain a U.S. Government security clearance as a condition of employment. Failure to obtain or maintain the required security clearance may result in the withdrawal of an employment offer or termination of employment, consistent with applicable law.

Preferred Qualifications

• Experience with onboard satellite payload processing or software-defined payloads
• Knowledge of RF systems, link budgets, and waveform design
• Experience with AI/ML acceleration in ISR or space-based analytics
• Familiarity with Altera FPGA architecture and toolchain
• Understanding of radiation-tolerant design and space qualification requirements

Key Competencies

• Strong system-level architecture and problem-solving skills
• Ability to balance performance, power, and reliability for space environments
• Customer-facing experience with aerospace/defense stakeholders
• Clear communication and cross-functional collaboration skills

Job Type

Regular

Shift

Shift 1 (United States of America)

Primary Location

Portsmouth

Additional Locations

San Jose, California, United States

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.