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AMD in Santa Clara is looking for an experienced Logic Design Engineer to work on Graphics Memory Controller IP for high-performance GPUs. Candidates should possess over five years of experience in digital design, particularly in high-speed memory interfaces like HBM and GDDR.
The ideal applicant will be proficient in RTL development, Verilog, and industry-standard CAD tools. This role requires strong problem-solving abilities and attention to detail as well as a commitment to collaborating effectively within a team.
Successful candidates will be eligible for AMD’s benefits package.
AMD in Santa Clara is looking for an experienced Logic Design Engineer to work on Graphics Memory Controller IP for high-performance GPUs. Candidates should possess over five years of experience in digital design, particularly in high-speed memory interfaces like HBM and GDDR.
The ideal applicant will be proficient in RTL development, Verilog, and industry-standard CAD tools. This role requires strong problem-solving abilities and attention to detail as well as a commitment to collaborating effectively within a team.
Successful candidates will be eligible for AMD’s benefits package.