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RTL Design Engineer

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Los Angeles (CA)

On-site

USD 125,000 - 200,000

Full time

14 days ago

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Job summary

A leading semiconductor manufacturer is seeking an RTL Design Engineer to develop high-performance, low-power IC solutions. This role involves mentoring team members, designing digital circuits, and requires extensive experience in RTL design and verification. The position offers competitive compensation, bonuses, and a hybrid work environment.

Benefits

Annual performance-based bonus
Stock options
Visa sponsorship
Relocation bonus

Qualifications

  • 7+ years of related experience in digital design.
  • Proficiency in SystemVerilog/Verilog for simulations and synthesis.
  • Experience with high-speed and low-power designs.

Responsibilities

  • Mentor and lead team members in digital and mixed signal circuits.
  • Design logic and state machines in SystemVerilog/Verilog.
  • Develop and debug RTL using simulation and synthesis tools.

Skills

SystemVerilog
Verilog
Digital Design
Programming
Linux

Education

Bachelor's or Master's degree in Electrical Engineering

Tools

Design Compiler
PrimeTime
Perl
Tcl
Python

Job description

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Leading semiconductor manufacturer with competitive compensation, generous bonus, and stock options! Also offering relocation bonus and/or be willing to relocate to Atlanta, GA

This Jobot Job is hosted by: Michael Ramsey

Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume.

Salary: $125,000 - $200,000 per year

A bit about us:

Leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center markets.

This is a great opportunity to work with other global team members to design building blocks for various products as well as an entirely new product for the company! Must be willing to relocate to Atlanta, GA!

Why join us?

  • Salary: $125,000 to $200,000
  • Annual performance-based bonus (10% to 15%)
  • Stock options
  • Hybrid work opportunity
  • Visa sponsorship and/or relocation bonus as needed

Job Details

The Digital Design Engineer will architect and develop RTL for various products with a focus on Digital Controls for PMICs (using FSMs and/or micro-controllers), Encryption and Authentication algorithms using SPDM security and/or PLDM platform level management protocols. The successful hire will have RTL to GDSII flow experience using industry standard tools. Knowledge of embedded micro-controllers such as RISCV and I2C/I3C protocols are advantageous.

Responsibilities:

  • Mentor and lead team members to architect, develop and debug digital and mixed signal circuits
  • Design various logic and state machines in SystemVerilog/Verilog RTL
  • Develop and debug RTL using industry-standard simulation and synthesis tools, along with LEC, CDC, Lint, DFT and STA tools
  • Provide PPA (Power, Performance, Area) and schedule estimates, as well as design specifications for the RTL
  • Coordinate with Verification/AMS design teams to ensure proper operation and functional and code coverage
  • Provide floor-planning and support integration of digital and analog circuits at top level

Qualifications:

  • Bachelor's or Master's degree in Electrical Engineering
  • 7+ years of related experience including high speed and low power digital design in advanced deep sub-micron processes
  • Proficiency with SystemVerilog/Verilog RTL for both behavioral simulations and synthesis
  • Skills in Design Compiler and PrimeTime
  • Programming/scripting experience with Perl, Tcl and/or Python
  • Experience working with Linux
  • Preferred experience with embedded micro-controllers; encryption, authentication, management protocol circuits; digital control circuits for PMICs; CXL data link, transaction, and arbitration; or memory controllers.

Interested in hearing more? Easy Apply now by clicking the "Apply Now" button.

Jobot is an Equal Opportunity Employer. We provide an inclusive work environment that celebrates diversity and all qualified candidates receive consideration for employment without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.

Sometimes Jobot is required to perform background checks with your authorization. Jobot will consider qualified candidates with criminal histories in a manner consistent with any applicable federal, state, or local law regarding criminal backgrounds, including but not limited to the Los Angeles Fair Chance Initiative for Hiring and the San Francisco Fair Chance Ordinance.

Seniority level
  • Seniority level
    Mid-Senior level
Employment type
  • Employment type
    Full-time
Job function
  • Job function
    Engineering and Information Technology
  • Industries
    Software Development

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