Quality Reliability Engineer
Intel
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Benefits offered by this job
Job summary
Intel seeks a Board-Level Quality and Reliability Engineer to ensure reliability of advanced semiconductor packages through development, qualification, and production stages.
Lead qualification planning, risk assessments, and analysis; engage JEDEC/IPC standards bodies and drive reliability improvements with cross-functional teams.
Qualifications
- Experience in semiconductor package, board-level, or electronic system reliability.
- Knowledge of reliability qualification methodologies including thermal cycling, mechanical shock, vibration, temperature-humidity testing, and accelerated stress testing.
- Understanding of solder interconnect reliability, PCB technologies, SMT assembly processes, and package-to-board interactions.
Responsibilities
- Develop qualification plans covering thermal cycling, mechanical tests, and humidity testing.
- Establish reliability requirements and acceptance criteria.
- Lead risk assessments using FMEA, fault tree analysis, and reliability growth methodologies.
Skills
Education
Tools
Job description
Job Description: The Board-Level Quality and Reliability Engineer is responsible for ensuring the quality, robustness, and long-term reliability of advanced semiconductor products throughout development, qualification, and production. The successful candidate will provide technical leadership in board-level reliability assessment, failure analysis, qualification methodology development, risk management, and industry standards engagement.
This role serves as the technical authority for board-level reliability of advanced packages, including BGA, LGA, and heterogeneous integration technologies. The engineer will lead reliability strategy development, qualification planning, and failure mechanism assessments while partnering closely with product development, packaging, manufacturing, suppliers, and customers.
The position also requires active participation and technical leadership within JEDEC and other industry standards organizations to influence future reliability requirements, qualification methodologies, and semiconductor packaging standards. JEDEC quality and reliability committees (JC-14) are identified as key industry forums for qualification methodologies, reliability testing, and standards development.
- Develop qualification plans covering thermal cycling, mechanical shock, vibration, drop, power cycling, humidity, and use-condition testing.
- Establish reliability requirements and acceptance criteria based on customer, market, and business needs.
- Lead risk assessments using FMEA, fault tree analysis, and reliability growth methodologies.
- Develop reliability demonstration plans and statistical confidence strategies.
- Lead complex reliability investigations and root-cause analyses.
- Drive corrective and preventive actions across product design, materials, assembly, and manufacturing processes.
- Perform Weibull analysis, DOE studies, and reliability statistics.
- Represent the company within JEDEC, IPC, AEC, and related standards organizations.
- Actively contribute to JEDEC JC-14 Quality and Reliability committees and subcommittees.
- Author, review, and ballot industry standards, technical publications, and qualification methodologies.
Demonstrated ability to work within cross-functional teams consisting of design, process, manufacturing, quality, and supplier engineering organizations.
Ability to communicate technical findings and reliability risks to stakeholders in a clear and concise manner.
Strong technical writing skills for qualification reports, failure analysis summaries, and reliability assessments.
Master's degree in Materials Science, Mechanical Engineering, Electrical Engineering, Reliability Engineering, Physics, or related technical field with 3+ years of industry experience, OR
Ph.D. in Materials Science, Mechanical Engineering, Electrical Engineering, Reliability Engineering, Physics, or related technical field with 1+ years of industry experience.
- Experience in semiconductor package, board-level, or electronic system reliability.
- Knowledge of reliability qualification methodologies including thermal cycling, mechanical shock, vibration, temperature-humidity testing, and accelerated stress testing.
- Understanding of solder interconnect reliability, PCB technologies, SMT assembly processes, and package-to-board interactions.
- Experience supporting failure analysis investigations and root cause determination.
- Familiarity with reliability statistics, Weibull analysis, Design of Experiments (DOE), and data analysis techniques.
- Working knowledge of FMEA, risk assessment methodologies, and reliability qualification planning.
- Familiarity with JEDEC reliability and qualification standards.
- Interest in participating in industry standards organizations and technical working groups.
- Ability to represent company positions in technical discussions with customers, suppliers, and industry partners.
- Experience with advanced semiconductor packaging technologies including FCBGA, flip-chip, heterogeneous integration, chiplet-based architectures, or 2.5D/3D packaging.
- Experience conducting board-level reliability testing and data interpretation.
- Knowledge of thermo-mechanical failure mechanisms including solder fatigue, pad cratering, substrate cracking, delamination, and warpage effects.
- Familiarity with finite element modeling (FEM) or physics-of-failure approaches.
- Prior participation in JEDEC, IPC, or similar industry standards activities.
- Experience reviewing or contributing to reliability specifications, qualification requirements, or industry guidance documents.
- Attendance at industry conferences, technical symposiums, or standards committee meetings.
- Demonstrated initiative in driving reliability improvements and problem-solving efforts.
- Ability to manage multiple projects and priorities in a fast-paced development environment.
- Track record of successfully influencing technical decisions through data-driven analysis.
Experienced Hire
Shift 1 (United States of America)
US, Arizona, Phoenix
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
N/A
- We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $120,860.00 - 170,630.00 USD
This role will require an on-site presence. Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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