Product Engineering Architect

Cadence Design Systems; San Jose (CA); On-site; USD 186,000 - 345,000; Full time

Benefits offered by this job

Paid vacation

Paid holidays

401(k) with employer match

Employee stock purchase plan

Medical, dental, and vision plans

Job summary

Cadence Design Systems in San Jose, California, is seeking a Product Engineering Architect to provide senior technical leadership for Cadence Virtuoso Heterogeneous Integration technologies. You will partner with customers, Product Management, R&D, and Field teams to define product strategy and deliver complex solutions for 3D IC, heterogeneous integration, and advanced packaging.

You will own the roadmap, drive early customer engagements, produce PRS and use cases, mentor engineers, create

Qualifications

• BS in Electrical Engineering, Electronics, or a related technical field.
• Deep expertise in semiconductor design, physical implementation, advanced packaging, or EDA product engineering.
• Strong hands-on knowledge of the Cadence Virtuoso platform and related design flows.
• 15+ years of relevant experience in product engineering or technical leadership.
• Proven track record with strategic customers and executive-level technical communication.

Responsibilities

• Drive end-to-end solution for 3D IC, heterogeneous integration, and advanced packaging.
• Lead strategic customer engagements and guide deployment of advanced design flows.
• Influence product roadmap using customer requirements and market trends.
• Produce PRS, use cases, and support R&D during development.
• Provide technical leadership and prioritize critical bugs and enhancements.
• Mentor product engineers and cross-functional teams on design challenges and customer communication.
• Create executive-ready collateral, demonstrations, and enablement materials.
• Represent product engineering in roadmap discussions, reviews, launches, and industry events.
• Collaborate with R&D, Product Management, Field teams, Publications, and Product Validation to deliver robust capabilities.

Skills

Semiconductor design

Cadence Virtuoso

Product engineering leadership

Customer enablement

Cross-functional leadership

Executive communication

3DIC/heterogeneous integration

Education

BS in Electrical Engineering or related field

Tools

APD+

Package design methods

Virtuoso SKILL

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title:Product Engineering Architect

Location: San Jose, California, United States

Reports to: Product Engineering Director

Job Overview:

As Product Engineering Architect, you provide senior technical leadership for the development and proliferation of Cadence Virtuoso Heterogeneous Integration technologies. In this role, you partner closely with strategic customers, Product Management, R&D, Product Validation, and Application Engineering teams to define product strategy, drive innovation, and ensure successful delivery of complex technical solutions.

As an architect, you combine deep technical expertise with market understanding to shape the product roadmap for the physical implementation flows around 3D IC, heterogeneous integration and advanced packaging. You will drive team-level technical objectives throughout the development cycle and lead early customer engagements.

Job Responsibilities:

• Drive, validate and promote an end-to-end solution for system design implementation flows spanning 3D IC, heterogeneous integration and advanced packaging.
• Lead strategic customer engagements, guiding customers to define and deploy advanced heterogeneous integration and multi-die co-design methodologies.
• Influence product roadmap direction by synthesizing customer requirements, market trends, competitive insights, and technical feasibility.
• Produce high-quality Product Requirement Specifications (PRS), technical use cases, and support R&D during product development.
• Provide technical leadership, including requirement trade-off analysis, solution validation, adoption risk assessment, and prioritization of critical bugs and enhancements.
• Mentor and guide product engineers and cross-functional team members on complex design-flow challenges, technical decision-making and customer communication.
• Create executive- and customer-ready technical collateral, demonstrations, application workflows, and enablement materials that accelerate field and customer adoption.
• Represent product engineering in roadmap discussions, customer reviews, product launches, and industry events.
• Collaborate cross-functionally with R&D, Product Management, Field teams, Technical Publications and Product Validation to deliver robust, customer-ready capabilities.
• Own deliverables from definition through customer deployment with a strong focus on execution and accountability.

Job Qualifications:

• BS in Electrical Engineering, Electronics, or a related technical field.
• Deep expertise in semiconductor design, physical implementation, advanced packaging, or EDA product engineering.
• Strong hands-on knowledge of the Cadence Virtuoso platform and associated custom IC design flows, with the ability to connect detailed technical issues to broader product strategy.
• 15+ years of relevant experience in product engineering, methodology development, customer enablement, or technical leadership roles.
• Demonstrated ability to shape technical direction and align cross-functional stakeholders around high-value deliverables.
• Proven track record working with strategic customers, including discovery of complex requirements, executive-level technical communication, and successful deployment of advanced design flows.
• Ability to lead through influence, mentor technical contributors, prioritize effectively, and drive team-level technical objectives.
• Strong verbal and written communication skills, with the ability to collaborate effectively across global and multicultural teams, and across functions.
• Highly motivated by the rapidly evolving landscape of 3DIC, heterogeneous integration, and advanced packaging technologies, with a passion for driving innovation in next-generation semiconductor solutions.

Additional Skills/Preferences:

• Experience with co-design flows around 3D IC, heterogeneous integration, and silicon-package-board integration.
• Knowledge of Cadence Allegro Package Designer Plus (APD+) and package implementation methodologies.
• Knowledge of Cadence Virtuoso SKILL language or any other interpreted language.

Additional Information:

Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.

Travel:

Approximately 5-10% travel, primarily for strategic customer engagements and internal collaboration

The annual salary range for California is $185,500 to $344,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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