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Advanced Micro Devices, Inc. in San Jose is seeking a Signal Integrity Engineer in the Adaptive and Embedded Computing Group to ensure AMD's next-gen products meet reliability and performance targets.
You will model and validate high-speed SerDes channels, memory interfaces and Ethernet links, guiding layout teams and collaborating with HW, packaging, PCB teams and suppliers for first-time success. The role demands strong SI tools usage, interconnect expertise, and hands-on lab validation to
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As a Signal Integrity Engineer at Adaptive and Embedded Computing Group (AECG), AMD, you will be responsible for ensuring that AMD's next-generation products deliver industry-leading reliability, performance, and efficiency. This role involves analyzing, modeling and validating the complex interconnects of high-speed Serializer/De-serializer (SerDes) channels @56/64/112/128/224+ Gbps, High speed memories like LPDDR4/5x/6, DDR5, PCIe Gen 5/6 etc., and 400/800/1600Gbps Ethernet links. You will be providing guidelines to board layout teams based on SI and Power simulations and for high-speed structures.
In this role, you will closely collaborate with Board HW designers, HW architects, IC packaging team, PCB team, and external partners/suppliers to ensure first time success of the system/board products.
Benefits offered are described: AMD benefits at a glance.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.
This role is not eligible for visa sponsorship.
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