Principal Wafer Bonding Integration Engineer

nEye.ai; Santa Clara (CA); On-site; USD 180,000 - 280,000; Full time

Job summary

nEye.ai is seeking a Wafer Bonding Integration Engineer to lead advanced wafer bonding process development and manufacturing transfer for next-gen optical switching products.

The role sits at the intersection of product engineering, process integration, and external foundry partnerships, driving manufacturable bonding solutions and successful volume production.

Qualifications

• 10+ years in new product introduction with wafer process integration experience.
• Hands-on with advanced wafer bonding technologies (Fusion, Eutectic, Hybrid, Direct).
• Experience with TSV, wafer thinning, cavity SOI, or 3D integration.

Responsibilities

• Own wafer bonding integration strategy from early product development to high-volume manufacturing.
• Lead cross-functional coordination with design teams and foundries for NPI.
• Drive transfer activities ensuring manufacturability and yield objectives.
• Interface with fabrication partners and manage process readiness and reliability.

Skills

Wafer bonding

Process integration

Manufacturing transfer

NPI

Statistical analysis

Education

BS/MS/PhD in Materials Science, Mechanical Engineering, Electrical Engineering, Physics, MEMS

Tools

SEM

IR inspection

Profilometry

C-SAM

AFM

Job description

About Us nEye.ai, a well-funded optical switch startup, is poised to revolutionize the future of data centers. nEye’s MEMS-based silicon photonics optical circuit switches (OCS) eliminate critical bottlenecks in AI processing by enabling direct optical connections among thousands of GPUs and memory units. The company's OCS is an ultra-low power consumption, high radix, compact chip-scale design, offering hyperscale data centers enhanced performance, efficiency, and scalability.

About Us nEye.ai, a well-funded optical switch startup, is poised to revolutionize the future of data centers. nEye’s MEMS-based silicon photonics optical circuit switches (OCS) eliminate critical bottlenecks in AI processing by enabling direct optical connections among thousands of GPUs and memory units. The company's OCS is an ultra-low power consumption, high radix, compact chip-scale design, offering hyperscale data centers enhanced performance, efficiency, and scalability.

Role Overview

We are seeking a Wafer Bonding Integration Engineer to lead the development, integration, and manufacturing transfer of advanced wafer bonding processes that are foundational to nEye's next-generation optical switching products.

This is a highly cross-functional role sitting at the intersection of product engineering, process integration, and manufacturing. You will partner closely with internal design teams and external foundry partners to develop robust wafer bonding solutions, drive new product introduction (NPI), and enable successful transition into volume manufacturing.

The ideal candidate combines deep technical expertise in wafer bonding with strong product integration experience and enjoys working directly with foundries to solve complex manufacturing challenges.

Candidates with foundry process integration, advanced packaging, MEMS, silicon photonics, or Technical Service Engineering experience are encouraged to apply.

Key Responsibilities

Product Development & Manufacturing Integration

• Own wafer bonding integration strategy from early product development through high-volume manufacturing.
• Partner with design engineering, process development teams, and external foundries to develop robust manufacturing flows.
• Lead process transfer activities and ensure manufacturable, repeatable bonding solutions across multiple foundry partners.
• Serve as the primary technical interface between nEye engineering teams and external fabrication partners throughout NPI.
• Drive process readiness for new product introductions, ensuring schedule, yield, quality, and reliability objectives are achieved.

Wafer Bonding Process Integration

• Develop and optimize advanced wafer bonding processes including:
  • Fusion Bonding
  • Eutectic Bonding
  • Hybrid Bonding
  • Direct Wafer Bonding
  • (Anodic bonding experience is beneficial but not required)
• Define bonding process windows, alignment strategies, thermal budgets, and material compatibility.
• Optimize surface preparation, cleaning, activation, CMP requirements, and post-bond processing.
• Develop integration strategies that balance bonding performance with downstream manufacturing requirements.
• Collaborate with packaging and process integration teams on bonded wafer architectures.

Foundry Collaboration

• Lead technical engagement with external foundries throughout process development and manufacturing.
• Support tape-outs, process qualifications, engineering builds, and production ramps.
• Review process data, SPC metrics, excursion reports, and corrective actions with foundry partners.
• Drive continuous improvements in yield, manufacturability, reliability, and cost.
• Coordinate engineering experiments and process characterization across multiple manufacturing partners.

Yield Improvement & Failure Analysis

• Analyze wafer-level metrology and inspection data to identify process limitations and failure mechanisms.
• Lead root cause investigations involving bonding defects such as:
  • voids
  • delamination
  • alignment errors
  • particle contamination
  • bond strength failures
• Work closely with FA laboratories and foundries to implement corrective actions.
• Drive continuous yield improvement initiatives using statistical methods and structured problem-solving tools.

Required Experience

• BS, MS, or PhD in Materials Science, Mechanical Engineering, Electrical Engineering, Physics, MEMS, or a related technical discipline.
• 10+ years of experience in new product introduction with ownership in wafer process integration, advanced packaging, CMOS manufacturing.
• Hands-on and product development expertise with one or more advanced wafer bonding technologies, including:
  • Fusion Bonding
  • Eutectic Bonding
  • Hybrid Bonding
  • Direct Bonding
• Experience with TSV integration, wafer thinning, cavity SOI, or 3D integration technologies.
• Experience supporting products through NPI and manufacturing ramp.
• Strong understanding of wafer-level process integration and manufacturing interactions.
• Experience working directly with semiconductor foundries or external manufacturing partners.
• Strong understanding of SPC, DOE, process characterization, yield improvement, and statistical analysis.

Preferred Experience

• Experience in MEMS, silicon photonics, advanced packaging, or heterogeneous integration.
• TSE experience supporting semiconductor customers or foundries.
• Familiarity with wafer-level metrology techniques including SEM, IR inspection, profilometry, C-SAM, AFM, or similar analytical tools.
• Experience leading cross-functional engineering efforts between design, manufacturing, and suppliers.
• Working knowledge of 8D, FMEA, Six Sigma, and structured root cause methodologies.
• Comfortable operating in a fast-paced startup environment where engineers have broad technical ownership.

nEye is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law.

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.

Starting salary and title will depend on, and be commensurate with, relevant experience, skills, training, education, market demands, and the ultimate job duties and requirements.