Principal Validation Engineer

Davita Inc.; Westborough (MA); On-site; USD 160,000 - 239,000; Full time

Job summary

A leading technology company seeks a Characterization Engineer to analyze and debug high-speed SerDes IO. Candidates should possess strong programming skills in C/C++ and Python, with extensive experience in SERDES tools. This role offers the opportunity to work on cutting-edge technologies within a dynamic team, optimizing high-speed interfaces vital for future communication infrastructures.

Benefits

Flexible time off

401k plan

Year-end shutdown

Paid time off to volunteer

Qualifications

• 10+ years of related experience required for Bachelor's degree.
• In-depth knowledge of SERDES characterization tools and methods.
• Experience in PCIe and Ethernet interfaces is a plus.

Responsibilities

• Debugging SerDes analog interfaces and improving performance.
• Electrical characterization of PCIe and Ethernet SerDes interfaces.
• Mentoring junior engineers in characterization principles.

Skills

Critical thinking

Problem-solving

Communication

Education

Bachelor's degree in Computer Science or Electrical Engineering

Master's degree in Computer Science or Electrical Engineering

Tools

C/C++

Python

MATLAB

Scope

BERT

Network analyzer

Job description

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

The Marvell DCE-CCS post-silicon validation group designs and develops test platforms for validating multi-core Arm-based Network processors used in many communication infrastructure applications such as 5G base stations, cloud computing platforms, and artificial intelligence custom silicon. The electrical characterization team is a post-silicon validation sub-group focused on the debug and characterization of SerDes and DDR interfaces on the processor. The SerDes interface runs at speeds up to 224Gbps PAM4 and are used for several protocols including Ethernet and PCIe. The DDR interface runs at DDR5 speeds up to 6400MT/s. Characterization engineers are responsible for developing test platforms used and automated test suites to characterize the analog interfaces over process voltage and temperature (PVT) extremes to determine if the silicon is viable for volume production.

What You Can Expect

• As a member of a dynamic development team, the candidate will be responsible for contributing to the analysis and debugging of high-speed SerDes IO. The candidate will participate in debugging the SerDes analog interface to improve SerDes/PLL performance and resolve issues over PVT. Participation in these tasks will allow for the candidate to gain insight into the operation of state-of-the-art SerDes analog circuits, including PLLs, Clock and Data Recovery circuits, as well as Transmit FFE, Receiver CTLE, and DFE equalization circuits.

• Contribute to debugging SerDes/PLL analog circuits for performance optimization or to root cause failures.

• Electrical characterization/compliance testing of PCIe and Ethernet SerDes interfaces.

• Contribute to the creation of automated test suites to support electrical characterization with a primary focus on the Python scripting language. Matlab programming experience is a plus for this position.

• Mentoring junior engineers in electrical characterization principles; TX, RX, PLL measurement requirements and methodologies.

• Contribute to the design of High-Speed PCBs used for electrical characterization/compliance testing.

• Low-level protocol debug of PCIe and Ethernet interfaces, including initialization and link training.

What We're Looking For

• Bachelor's degree in Computer Science, Electrical Engineering, or related fields and 10+ years of related professional experience. Master's degree in Computer Science, Electrical Engineering, or related fields with 5+ years of experience.

• In-depth working knowledge of test equipment used for SERDES characterization (Scope, BERT, Network analyzer, etc.).

• Working knowledge of PCIe and Ethernet interface and characterization issues. Working knowledge and experience with the DDR interface is a definite plus.

• Experience in software programming languages development: C/C++, Python, etc., as well as mathematical programming such as MATLAB

• Critical thinking and problem-solving attitude, and ownership of the group's results.

• Knowledge in SERDES modeling techniques

• Excellent verbal and written communication skills.

Expected Base Pay Range (USD)

160,900 - 238,100, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [e-mail].

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