Enable job alerts via email!
Boost your interview chances
Create a job specific, tailored resume for higher success rate.
A leading technology company seeks a Principal Validation Engineer to enhance SERDES validation for communication infrastructure applications. This role involves debugging high-speed IO, conducting electrical characterization, and mentoring junior engineers. Ideal candidates possess a Bachelor's in a relevant field, 10+ years of experience, and expertise in test equipment. Opportunities exist to innovate and contribute significantly to cutting-edge technologies.
Join to apply for the Principal Validation Engineer role at Marvell Technology
3 days ago Be among the first 25 applicants
Join to apply for the Principal Validation Engineer role at Marvell Technology
Get AI-powered advice on this job and more exclusive features.
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The Marvell DCE-CCS post-silicon validation group designs and develops test platforms for validating multi-core Arm-based Network processors used in many communication infrastructure applications such as 5G base stations, cloud computing platforms, and artificial intelligence custom silicon. The electrical characterization team is a post-silicon validation sub-group focused on the debug and characterization of SerDes and DDR interfaces on the processor. The SerDes interface runs at speeds up to 224Gbps PAM4 and are used for several protocols including Ethernet and PCIe. The DDR interface runs at DDR5 speeds up to 6400MT/s. Characterization engineers are responsible for developing test platforms used and automated test suites to characterize the analog interfaces over process voltage and temperature (PVT) extremes to determine if the silicon is viable for volume production.
What You Can Expect
Referrals increase your chances of interviewing at Marvell Technology by 2x
Franklin, MA $95,000.00-$110,000.00 1 day ago
Franklin, MA $90,000.00-$100,000.00 1 week ago
Massachusetts, United States $65.00-$70.00 2 days ago
Acton, MA $90,000.00-$100,000.00 1 week ago
We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.