Principal TPIP/HSIO Engineer

Arm; Seattle (WA); Hybrid; USD 263,000 - 355,000; Full time

Job summary

Arm is seeking a Principal TPIP Quality Engineer in Seattle to own pre‑silicon quality for HSIO subsystems, including DDR, PCIe, and eUSB. You will partner with TPIP vendors, integration teams, and architects to ensure DFX targets are met from simulation through silicon.

In this senior role you will drive silicon‑to‑simulation correlation, analyze eye diagrams and BER data, chair TPIP Councils, and help shepherd quality criteria across projects while working in a hybrid environment.

Qualifications

• 10+ years experience in high‑speed interface design, validation, or bring‑up (DDR, PCIe, SerDes).
• Proven track record in post‑silicon characterization (BER, margining) and correlating with pre‑silicon simulations.
• Strong scripting skills (Python, TCL) for data parsing, test automation, and result visualization.
• Excellent communication skills: able to drive technical discussions across vendors and internal teams.

Responsibilities

• Collaborate with IP vendors and internal integration/architecture/DV/DFT/PTE teams to achieve high silicon quality performance for HSIO blocks: DDR, PCIe, eUSB, D2D, etc.
• Drive closure on DFX metrics (test coverage, margin analysis, stuck‑at/scan coverage, clock‑domain checks).
• Help develop and maintain methodologies to validate that silicon behavior matches pre‑silicon estimates.
• Analyze silicon measurements (eye‑diagrams, BER, BIST logs) and correlate back to design and simulation data.
• Chair the DDR and PCIe TPIP Councils to harmonize quality criteria, test architectures, and vendor deliverables across projects.

Skills

High-speed interface design

Post-silicon characterization

Scripting (Python, TCL)

Excellent communication

Education

Bachelors or Masters in Electrical Engineering

Tools

Python

TCL

Job description

Job ID 2026-19806 Date posted 29/10/2026 Location San Jose, California; Austin, Texas; Seattle, Washington; San Diego, California Category Quality

Job Overview

As a Principal TPIP Quality Engineer you’ll be the go‑to expert for pre‑silicon quality of our high‑speed I/O (HSIO) subsystems. You’ll initially work on DDR, PCIe, eUSB, then drive quality across upcoming SOCs by partnering with TPIP vendors, integration teams, and architects to ensure our DFX targets are met from simulation through silicon.

Responsibilities

Pre‑Silicon Quality Engineering

• Collaborate with IP vendors and internal integration/architecture/DV/DFT/PTE teams to achieve high silicon quality performance for HSIO blocks: DDR, PCIe, eUSB, D2D, etc.
• Drive closure on DFX metrics (test coverage, margin analysis, stuck‑at/scan coverage, clock‑domain checks).

Silicon‑to‑Simulation Correlation

• Help develop and maintain methodologies to validate that silicon behavior matches pre‑silicon estimates.
• Analyze silicon measurements (eye‑diagrams, BER, BIST logs) and correlate back to design and simulation data.

TPIP Council Leadership

• Chair the DDR and PCIe TPIP Councils to harmonize quality criteria, test architectures, and vendor deliverables across projects.
• Partner closely with Architecture, Integration, Validation, Package, and SIPI teams to anticipate integration challenges.

Required Skills And Experience

• Bachelor’s or Master’s in Electrical Engineering or related field.
• 10+ years experience in high‑speed interface design, validation, or bring‑up (DDR, PCIe, SerDes).
• Proven track record in post‑silicon characterization (BER, margining) and correlating with pre‑silicon simulations.
• Strong scripting skills (Python, TCL) for data parsing, test automation, and result visualization.
• Excellent communication skills: able to drive technical discussions across vendors and internal teams.

Please note that no relocation package is available for this role.

Salary Range

$262,700-$355,400 per year

We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process.

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At Arm, we believe progress happens when people are empowered to think bigger and push beyond what seems possible. Our 10x mindset is about curiosity, ambition and creating impact that will be used by millions. We learn fast, prioritise collaboration and turn bold ideas into real technology. We look for people who are inspired by this way of working and want to grow in an environment where bold ideas are welcomed. Discover how the 10x mindset shapes life at Arm:

Use of AI in Your Application

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Hybrid Working

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.