Senior Hardware / Software Design Engineer III with TS/SCI + Poly

Aperio Global; Fort Meade (MD); On-site; USD 130,000 - 230,000; Full time

Benefits offered by this job

Health insurance

401k match

Life insurance

Paid time off

Disability insurance

Professional development

Job summary

Aperio Global is seeking an experienced senior HW/SW Design Engineer to design, develop, and test FPGA-based hardware and software processing components for RF communication and collection systems at Fort Meade, MD.

The role combines FPGA RTL development, DSP algorithm implementation, Linux integration, and hardware/Software co-design to deliver complete subsystem solutions. Active TS/SCI with Polygraph is required.

Qualifications

• Bachelor's degree plus 8 years of relevant experience or equivalent.
• Active TS/SCI with Polygraph required.
• Vivado experience preferred; Epiq Solution PDK experience a plus.

Responsibilities

• Lead hardware design efforts: FPGA RTL, timing closure, and DSP integration.
• Implement DSP algorithms and connect FPGA components with Linux-based software.
• Bridge FPGA-to-software stack and document system-level design decisions.

Skills

FPGA coding

DSP theory & application

Linux OS

C/C++ coding

Software-hardware integration

Education

Bachelor's degree + 8 years relevant experience

Tools

Vivado

Epiq Solution PDK

Job description

How We’re Different

We believe the highest-impact work in national security and technology is a team sport. At Aperio Global, we operate as a single, cohesive force aligned on a handful of mission‑critical efforts where our work truly moves the needle. We don't chase small wins. We solve for next.

We view the intersection of cybersecurity, artificial intelligence, and data analytics as an empirical discipline as rigorous and consequential as any field in science or engineering. That means we bring intellectual honesty, accountability, and transparency to every problem we take on. Our team includes tech innovators, Intelligence Community veterans, and security professionals who know that the best solutions come from diverse minds working toward a common mission. We value our people, those working quietly behind the scenes, doing the hard work that keeps our nation secure.

The best way to understand how we think is to see what we've built. From full-spectrum cyber operations and de-biased AI platforms to quantum networking and cloud-native software systems, our work speaks for itself.

Come solve with us

We offer competitive compensation and a comprehensive benefits package — including medical, dental, and vision coverage, a 401(k) retirement plan, life insurance, generous paid time off, short and long-term disability, professional development, and much more. We invest in our people because they are our most important asset — and because the mission demands the best.

Aperio Global is seeking an experienced senior HW/SW Design Engineer to join a small team to design, develop, construct, and test electronic hardware (FPGA) and software processing components for subsystems supporting RF communication and collection systems. This position requires expertise in FPGA development, digital signal processing implementation, and software‑hardware integration to support mission critical requirements. The contractor will lead technical design efforts, implement DSP algorithms and associated technical components in FPGA hardware, integrate with existing Linux code bases, bridge FPGA to software stack connection, plus document those efforts. This role combines hardware design responsibilities (FPGA RTL development, timing closure, resource optimization) with software development (integration code, system‑level software) to deliver complete subsystem solutions.

Mission Focus

You will implement DSP and associated technical components in FPGA for code base integration.

Technical Proficiency

Strong experience required for FPGA coding, Digital Signal Processing theory & application, Interfacing FPGA code with existing code bases and software; Knowledge of signal processing blocks and related DSP components, Linux OS, coding ability in C and C++.

Qualifications

Bachelor's degree plus 8‑years of relevant experience or equivalent.

Security Clearance

Active TS/SCI with Polygraph required.

Nice to Have

Additional experience with Vivado required; experience with Epiq Solution PDK preferred.

Salary Range

Dependent on Level and Experience: 130k-230k.

Benefits

• Health Care Plan (Medical, Dental & Vision)
• Retirement Plan (401k, IRA) with 100% employer match up to 6%
• Life Insurance (Basic, Voluntary & AD&D)
• Paid Time Off (Vacation, Sick & Public Holidays)
• Short Term & Long Term Disability
• Professional Development
• (and much more)

Aperio Global is an equal opportunity employer. We are committed to building an inclusive workforce where all employees and applicants are treated with respect and fairness. Employment decisions are based solely on qualifications, merit, and business needs — never on race, color, religion, sex, national origin, age, disability, genetic information, military or veteran status, pregnancy/childbirth, sexual orientation, gender identity, marital status, ethnicity, or any other characteristic protected by applicable federal, state, or local law.