Principal FPGA Engineer – Digital Hardware (VHDL/Verilog)

Anduril-1; Costa Mesa (CA); On-site; USD 253,000 - 336,000; Full time

Job summary

Anduril Industries in Costa Mesa, CA seeks a Principal Digital Hardware Engineer (FPGA/VHDL) to lead an electrical engineering team focused on embedded compute for vehicle management, DSP, and networking. You will own the full PCB development cycle for host boards with FPGAs/SoCs/SoMs, drive HDL design, and set up scalable workflows across the design cycle.

Eligible to obtain an active U.S. Top Secret clearance; salary range $253,000–$336,000 USD; comprehensive benefits and equity as part of

Qualifications

• 15+ years designing, testing and troubleshooting complex board designs in military/automotive or similar hardware.
• Experience leading an Electrical Engineering team focused on Digital Design.
• Proficiency in HDL languages (VHDL, Verilog).

Responsibilities

• Technical lead for electrical engineering team, creating embedded compute solutions for vehicle management, DSP, and networking.
• Own the full PCB development cycle of host boards for FPGAs / SoCs / SoMs (developing requirements, schematic capture, board layout, bring‑up, test, and integration).
• Develop and improve workflows throughout the FPGA / HDL design cycle (Architecture, functional block definition, simulation, system testing, HDL library standardization).
• Collaborate with internal stakeholders to develop a strategy for developing and rolling out compute solutions across Anduril in a scalable manner.
• Create, maintain and communicate product development schedules with sufficient detail to ensure that all assigned personnel are aware of their tasks and deadlines.

Skills

Digital design leadership

PCB design

HDL design (VHDL/Verilog)

Education

Bachelor's degree in Electrical Engineering

Tools

Altium Designer

Job description

Anduril Industries in Costa Mesa, CA seeks a Principal Digital Hardware Engineer (FPGA/VHDL) to lead an electrical engineering team focused on embedded compute for vehicle management, DSP, and networking. You will own the full PCB development cycle for host boards with FPGAs/SoCs/SoMs, drive HDL design, and set up scalable workflows across the design cycle.

Eligible to obtain an active U.S. Top Secret clearance; salary range $253,000–$336,000 USD; comprehensive benefits and equity as part of