Principal FPGA Engineer

Cesiumastro

Westminster (CO)

On-site

USD 218,000 - 226,000

Full time

14 days+

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Benefits offered by this job

Stock options
Health, dental, vision

Job summary

CesiumAstro is recruiting a Principal FPGA Engineer to architect and own the FPGA prototyping testbed for satellites and aerospace systems. You will collaborate with the senior trajectory team on power, thermal, device utilization and compute performance using space-qualified devices and a Linux CI/CD workflow.

The role leads large-scale prototype implementations, mentors staff, and drives advanced verification and design methodologies across multiple development efforts.

Qualifications

  • BS or MS in Electrical Engineering or Computer Engineering from an accredited university.
  • 15+ years of FPGA design, analysis and HDL implementation experience.
  • Expert-level HDL/HLS design entry, synthesis, and place-and-route knowledge.
  • Expert-level Linux-based CI/CD automation infrastructure expertise.
  • Expert-level AMD Versal toolchains and flow with Vivado, Vitis, EDF/ADF, AIE and HLS.
  • Strong DSP skills (NCO, FIR, FFT).
  • Expert-level FPGA optimization for utilization, power, thermal and compute performance.
  • Strong UVM(f)-based verification knowledge.
  • Ownership mindset with modular, verifiable, HIL-based regression.

Responsibilities

  • Develop advanced FPGA architectures, RTL designs, interfaces and digital hardware concepts.
  • Lead innovative FPGA verification methodologies and engineering evaluations.
  • Direct complex FPGA integration, bring-up, verification, qualification and validation activities.
  • Evaluate results, timing, performance, lab measurements and risks while crafting solutions.
  • Guide advanced verification approaches and tooling to support product development.
  • Act as technical advisor to leadership, customers and programs on FPGA tech.
  • Lead technical reviews and cross-disciplinary design efforts requiring FPGA expertise.
  • Mentor senior FPGA engineers and promote engineering practices.
  • Advance FPGA engineering practices and tooling with new approaches.

Skills

HDL design
FPGA optimization
Linux Ci/Cd
UVM-f verification
Power/thermal optimization
AMD Versal toolchains
DSP fundamentals
team mentorship
independent delivery

Education

BS in Electrical Engineering
MS in Electrical Engineering

Tools

Vivado
Vitis
AIE
HLS
UVMf

Job description

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State.

At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward-thinking individuals to join our team.

We are looking to add a Principal FPGA Engineer to our team. If you enjoy working in a startup environment, and are passionate about developing leading-edge hardware for satellites, spacecraft, and aerospace systems, we would like to hear from you.

As a Lead FPGA Research Engineer in CesiumAstro's Advanced Projects Group, and in collaboration with the senior technical trajectory team, you will be responsible for architecting, developing, maintaining and ultimately owning the company's FPGA prototyping testbed. You will also support advanced prototyping for CesiumAstro’s next-gen product development efforts. The FPGA prototyping testbed consists various types of development boards with a focus on (but not exclusive to) AMD devices (VCK190, VMK180, VPK180, VEK385, etc.) including associated test equipment (arbitrary waveform generators, oscilloscopes and logic analyzers) along with a state-of-the‑art UVMf simulation and verification environment based on a high‑performance Linux‑based compute cluster. The FPGA prototyping environment serves as an internal company resource for performing and implementing a wide variety of engineering evaluation tasks related to device performance and tooling/flow evaluations.

In this position, you will work closely with the senior technical trajectory team to perform and deliver engineering analysis related to power, thermal, device utilization and compute performance using modern space‑qualified programmable logic devices. Additionally, you will lead large‑scale cutting‑edge prototype implementations using regression‑gated Linux‑based Ci/Cd automation infrastructure.

JOB DUTIES AND RESPONSIBILITIES
  • Develop advanced FPGA architectures, RTL designs, interface solutions, and digital hardware concepts supporting complex products, emerging technologies, and future product capabilities.
  • Contribute to the development of new FPGA design principles, implementation techniques, verification methodologies, and engineering approaches that improve product performance and technical capability.
  • Lead unusually complex engineering studies, design evaluations, and technical investigations requiring innovative solutions and advanced engineering expertise.
  • Direct highly complex FPGA integration, hardware bring‑up, verification, debugging, qualification, and design validation activities across critical development efforts.
  • Evaluate simulation results, timing closure, hardware performance, laboratory measurements, engineering risks, and system interactions while developing innovative technical solutions.
  • Guide implementation of advanced verification approaches, qualification strategies, engineering improvements, and technical recommendations supporting successful product development.
  • Serve as a technical advisor to engineering leadership, customers, and program teams on advanced FPGA technologies, complex engineering challenges, and product development activities.
  • Lead advanced technical reviews, engineering investigations, customer discussions, and multidisciplinary design efforts requiring specialized FPGA expertise.
  • Mentor senior FPGA Engineers while promoting advanced engineering practices and supporting development of technical capability across engineering teams.
  • Advance FPGA engineering practices through development of innovative design approaches, verification methods, implementation techniques, and engineering tools.
  • Evaluate existing FPGA technologies, engineering methods, and development processes while identifying opportunities to improve long‑term technical capability.
  • Guide initiatives that strengthen FPGA performance, product reliability, engineering efficiency, innovation, and technical excellence across multiple development efforts.
JOB REQUIREMENTS AND MINIMUM QUALIFICATIONS
  • A Bachelor of Science (BS) or Master of Science (MS) degree in Electrical Engineering or Computer Engineering from an accredited university or institution.
  • 15+ years of experience in the design, analysis, and implementation of FPGA systems at the HDL level.
  • Expert‑level knowledge of FPGA design fundamentals (HDL/HLS design entry, verification, logical and physical synthesis, place‑and‑route)
  • Expert‑level knowledge of geographically distributed Linux‑based Ci/Cd automation infrastructure.
  • Expert‑level knowledge of AMD Versal toolchains and flow methodologies using Vivado, Vitis, Embedded Development Framework, AIE and HLS development tools and methodologies.
  • Strong foundational DSP skills (NCO, FIR, FFT, etc…)
  • Expert‑level knowledge of FPGA optimization strategies and tradeoffs for utilization, power, thermal, and compute performance.
  • Strong foundational knowledge of UVM(f)-based verification.
  • A strong sense of ownership and pride in delivering artisan‑grade implementations with a focus on modularity, verification and HIL‑based regression gating.
  • Maintain a robust training and mentorship pipeline for select early‑career engineers.
  • Ability to independently execute and deliver very challenging project and prototype concepts without direct supervision.
  • Ability to collaborate with the senior technical leadership team while maintaining a positive attitude and growth mindset.
  • Ability to maintain, evaluate, apply and drive development from a customer perspective of new tooling and design methodologies as they become available from our industry partners such as AMD and Siemens.

$218,000 - $226,000 a year

CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate’s work experience, education/training, and key skills. Full‑time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans.

CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard torace, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.

Please note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees.

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