Principal Engineer, IO Design

Micron Technology; Boise (ID); On-site; USD 140,000 - 210,000; Full time

Job summary

Micron Technology is seeking a Principal IO/Clocking Design Engineer to join our design team. You will lead development, design, optimization, verification, and fan out of high-speed IO and clocking circuits used in DRAM products.

You will model, simulate, and analyze timing budgets, jitter, and parasitics, collaborate across teams, and help drive advances to next process nodes.

Qualifications

• MSEE with 10+ years or BSEE with 12+ years in analog/mixed-signal design.
• Proficiency with UNIX and Cadence environment for simulation and SPF extraction.
• Strong communication and leadership to mentor engineers.
• Experience in high-speed IO, clocking and channel modeling.

Responsibilities

• Innovate, design, optimize and verify high-speed IO and clocking circuits.
• Apply high-speed circuit techniques and enhance performance evaluation of IO data path and clocking path.
• Develop modeling and simulation methodologies for full-chip and system-level performance.
• Collaborate with Product Engineering and SI teams to compare silicon with simulations and support correlation.
• Coordinate with process integration and transistor modeling teams on next node.

Skills

High-speed IO

Clocking design

Analog design

Mixed-signal design

UNIX

Cadence

SPF extraction

Device physics

Layout supervision

Communication skills

Silicon validation

Python scripting

PERL scripting

Education

MSEE

BSEE

Tools

Cadence

SPF extraction

Python

PERL

Job description

Req ID: JR107501 Principal Engineer, IO Design

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan out of these high-speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions.

Responsibilities

• Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products.
• Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level.
• Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level.
• Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities.
• Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node.

Minimum Qualifications

• Minimum MSEE + 10 years or BSEE + 12 years of industry experience in analog and mixed-signal circuit design.
• Proficiency with UNIX and CADENCE design environment (simulation, schematic entry, SPF extraction).
• Understanding of device physics and basic CMOS processing techniques.
• Ability to supervise layout work and understand good layout practices for high-speed circuits to minimize parasitic impacts.
• Strong communication skills with the ability to convey sophisticated technical concepts to other design peers both verbally and written.
• Mental agility is a must for this position as we work with all product types (commodity, mobile, graphics) and product teams in parallel with silicon validation efforts.

Preferred Qualifications

• 7+ years of experience in high-speed transmitter, receiver and clocking circuit design and optimization with proven silicon successes.
• Prior experience in channel modeling and characterization, transceiver noise and timing budget analysis, equalization techniques, SI knowledge, etc.
• Demonstrated ability in mentoring and coaching engineers early in their careers.
• Demonstrated ability with AI/ML usage and fluency in scripting languages such as PERL/Python.
• The Use of Agentic AI

Job Profile(s): Semiconductor Design Engineer 5

Relocation Level: TBD

Benefits

• Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
• Additionally, Micron benefits include a robust paid time-off program and paid holidays.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at [e-mail] or 1-800-336-8918 (select option #3)