Principal Engineer, Architecture (USB Systems & IP)

Lattice Semiconductor; San Jose (CA); On-site; USD 221,000 - 270,000; Full time

Job summary

Lattice Semiconductor is seeking a Principal Engineer to lead USB subsystem architectures across FPGA and SoC platforms. You will drive technical strategy, mentor engineers, and collaborate with architecture, silicon design, software, and product teams to deliver USB solutions that meet customer needs.

The role requires deep USB protocol expertise, hands-on experience with USB devices and firmware, and strong cross-functional leadership to shape product roadmaps from concept to deployment.

Qualifications

• MS or PhD in Electrical/Computer Engineering or related field.
• 12+ years of semiconductor, embedded systems, FPGA/ASIC/SoC experience.
• Deep knowledge of USB protocols (USB 2.0, USB 3.x, USB Type-C, PD).
• Hands-on USB device and firmware development experience.

Responsibilities

• Define architecture and requirements for future USB subsystems.
• Lead USB technology evaluations and integration decisions.
• Collaborate with silicon, firmware, software, and applications teams.
• Develop specifications, white papers, and executive presentations.
• Mentor engineers and engage with standards organizations.

Skills

USB protocol expertise

Embedded firmware

System architecture leadership

Cross-functional collaboration

Customer-facing engagement

Education

MS/PhD in EE/CE/CS

Tools

USB IP ecosystem

HDL/firmware tools

Job description

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Overview

Energy feeds on energy. If you flourish in a fast paced, results‑oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description

Lattice Semiconductor is seeking an experienced and highly motivated Principal Engineer to join our Architecture team. In this role, you will serve as a technical leader defining next‑generation USB solutions across FPGA, SoC FPGA, and system platforms. You will work closely with architecture, silicon design, software, applications, product planning, and ecosystem partners to develop innovative USB‑based solutions that enable differentiated customer experiences.

The ideal candidate combines deep USB protocol expertise with hands‑on experience developing USB devices, embedded firmware, software stacks, and USB controller architectures. This role requires both technical leadership and strong cross‑functional collaboration skills, with the ability to influence product strategy and drive complex architectural initiatives from concept through deployment.

Responsibilities

• Define architecture and technical requirements for future USB subsystem solutions across FPGA and SoC product families.


• Serve as the company‑wide subject matter expert for USB technologies including USB 2.0, USB 3.x, USB Type‑C, USB Power Delivery (PD), and related ecosystem standards.


• Evaluate, select, and guide integration of third‑party USB controller, PHY, and protocol IP solutions.


• Drive architecture studies, competitive analysis, and technology assessments related to USB connectivity, embedded systems, and customer applications.


• Collaborate with silicon design teams to define USB subsystem architectures, performance targets, configurability, and integration requirements.


• Work closely with firmware and software teams to define reference platforms, software architecture, and production‑ready solutions.


• Partner with applications engineering and strategic customers to understand emerging requirements and translate them into product roadmap recommendations.


• Develop technical specifications, architectural proposals, white papers, and executive‑level presentations.


• Contribute to system‑level validation, interoperability testing, and compliance strategies.


• Mentor engineers across multiple disciplines and provide technical guidance on complex USB‑related challenges.


• Engage with standards organizations, ecosystem partners, and industry forums as required to support technology strategy.

Required Qualifications

• M.S. or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.


• 12+ years of industry experience in semiconductor, embedded systems, FPGA, ASIC, or SoC development.


• Demonstrated technical leadership experience at the subsystem or system architecture level.


• Deep understanding of USB protocols and architectures, including:




• USB 2.0


• USB 3.x SuperSpeed


• USB Type‑C


• USB Power Delivery (PD)


• USB hubs and bridges


• Device, host, and OTG implementations




• Hands‑on experience developing USB‑based applications and products.


• Experience implementing or integrating USB device, host, or dual‑role solutions.


• Strong understanding of the USB controller IP ecosystem, including:




• Host controllers


• Device controllers


• Dual‑role controllers


• USB PHY architectures


• DMA and data movement architectures


• Industry‑standard third‑party USB IP offerings




• Experience developing embedded firmware for USB‑based systems and applications.


• Experience with USB boot loaders, firmware update mechanisms, device management, and enumeration flows.


• Experience developing reference software, middleware, BSPs, or USB application frameworks.


• Experience with USB application driver development, device drivers, kernel‑level software, or system software integration.


• Strong understanding of embedded processors, RTOS environments, and firmware/software partitioning.


• Experience debugging complex HW/FW/SW interactions using protocol analyzers, logic analyzers, and software debugging tools.


• Demonstrated ability to lead technical discussions across architecture, design, software, validation, and product organizations.


• Excellent written and verbal communication skills.

Preferred Qualifications

• Familiarity with FPGA architectures and FPGA‑based USB implementations.


• Experience with Linux USB subsystems, driver frameworks, and kernel development.


• Experience with Windows USB driver development and device certification processes.


• Knowledge of PCIe, Ethernet, MIPI, UART, SPI, I2C, or other common embedded interfaces.


• Experience with USB compliance testing and certification.


• Experience evaluating make‑versus‑buy decisions for third‑party IP and ecosystem software.


• Understanding of security concepts including secure boot, device authentication, firmware integrity, and trusted update mechanisms.


• Experience working directly with strategic customers and ecosystem partners.


• Prior participation in standards development organizations or industry consortiums.

Leadership Expectations

As a Principal Engineer, You Will Be Expected To:

• Provide technical leadership across multiple product generations.


• Influence product and technology strategy through data‑driven architectural analysis.


• Mentor engineers and foster engineering excellence across the organization.


• Drive consensus among diverse stakeholders while maintaining focus on customer value and product differentiation.


• Independently lead complex initiatives with minimal supervision.


• Identify emerging technology trends and recommend strategic investments aligned with company objectives.

Pay & Benefits

Consistent with Lattice Semiconductor values and applicable law, we provide the following information to promote pay transparency and equity. We have a market‑based pay structure which varies by location. Please note that the base pay range is a guideline, and our compensation range reflects the cost of labor in the U.S. geographic market based on the location of the role. Pay within these ranges varies and depends on job‑related knowledge, skills, and relevant work experience.

For candidates who receive and offer, the starting salary will vary based on various factors including, but not limited to, such qualifications as, skill level, competencies, and work location. The range provided may represent a candidate range and may not reflect the full range for an individual tenured employee.

Base Pay Range

245,000.00

In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!

Additional Information

This position requires a successful background and reference checks and satisfactory proof of your right to work in the United States.

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service‑driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.

As an E‑Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I‑9, Employment Eligibility Verification, upon hire. We do not use E‑Verify to pre‑screen job candidates and will comply with all E‑Verify regulations.