Principal Electrical Engineer

Mosaic People Solutions; California (MO); On-site; USD 150,000 - 210,000; Full time

Job summary

Mosaic People Solutions in the United States seeks a Principal Electrical Engineer to own the company’s next-generation custom ASIC program and to lead requirements, architecture, verification, and coordination with external design partners.

The role requires strong analog/mixed-signal expertise, experience delivering custom ASICs through full lifecycle, and the ability to drive cross-functional work across sensing, firmware, power, packaging, and test.

Qualifications

• Candidate has led at least one custom ASIC through full lifecycle from requirements to production release.
• Strong background in analog/mixed-signal development and low-noise signal conditioning.
• Experience coordinating with external ASIC design partners and internal stakeholders.

Responsibilities

• Own the custom ASIC program from high-level requirements through production release.
• Translate system needs into precise ASIC specifications and deliverables.
• Define review criteria and analyses for external design partners.
• Interface with ASIC firms and semiconductor vendors to guide the program.
• Oversee simulations, verify results, and validate against system requirements.
• Guide packaging, testing, and post-silicon bring-up activities.
• Maintain budgets for power, data, noise, and signal integrity at system level.
• Provide mentorship to junior engineers and communicate risks to leadership.

Skills

ASIC

Mixed-signal

Analog

Digital communications

System architecture

Leadership

Technical ownership

Education

Bachelor’s or Master’s degree in Electrical Engineering

Tools

SPICE

Verilog

Cadence

VHDL

Job description

We are partnering with an innovative company developing a next-generation implantable system designed to capture and transmit extremely low-voltage biological signals.

About the Role

We are seeking a Principal Electrical Engineer to serve as the internal technical owner of the company’s next-generation custom ASIC program.

An external ASIC design partner will perform the detailed transistor-level design. This role will lead the ASIC program from the company side, providing the technical judgment needed to direct, review, and challenge the external design team.

The ideal candidate will have taken at least one custom ASIC through the full development lifecycle, from high-level requirements and specification development through architecture, verification, tape-out, silicon bring-up, qualification, and production release.

This is a senior individual-contributor and technical-leadership role requiring strong analog and mixed-signal judgment, an understanding of digital communications, and the ability to work across ASIC, sensing, firmware, power, packaging, test, and system boundaries.

Key Responsibilities

• Own the custom ASIC program from high-level requirements and architecture through verification, silicon bring-up, qualification, and production release.
• Translate system-level requirements into clear, detailed ASIC specifications.
• Define technical deliverables, review criteria, and required analyses for the external ASIC design partner.
• Serve as the primary internal technical interface to ASIC design firms and other semiconductor development partners.
• Guide architecture tradeoff analyses and support selection of the final ASIC architecture.
• Review analog, digital, mixed-signal, and system-level simulations to confirm the appropriate analyses are being performed.
• Evaluate simulation assumptions, operating conditions, and technical outputs to ensure they accurately represent the intended system.
• Confirm that signal fidelity, noise, gain, bandwidth, power, timing, data output, and communication performance meet system requirements.
• Review analog-front-end architecture, including sensor interfaces, amplification, filtering, multiplexing, analog-to-digital conversion, and related low-noise signal-conditioning functions.
• Identify technical gaps, unsupported assumptions, and design risks in partner analyses and deliverables.
• Define and maintain system-level power, data, noise, and signal-integrity budgets.
• Lead silicon bring-up, benchtop testing, characterization, debugging, and correlation of measured results to simulation.
• Evaluate packaging, redistribution-layer, die-thinning, assembly, and miniaturization considerations that could affect noise, reliability, or electrical performance.
• Partner with electrical, firmware, systems, mechanical, test, materials, manufacturing, quality, and regulatory teams.
• Communicate technical risks, tradeoffs, decisions, and program status to internal stakeholders and senior leadership.
• Provide technical guidance and mentorship to junior electrical and test engineers.

Required Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
• 10+ years of experience in ASIC, mixed-signal, analog, semiconductor, electrical, or related high-reliability product development.
• Demonstrated experience taking at least one custom ASIC through the full development lifecycle, including requirements, specification, architecture, design oversight, verification, tape-out, silicon bring-up, qualification, and production release.
• Experience serving as the internal technical owner, program lead, systems architect, Principal or Staff Electrical Engineer, or similar leader for a custom-silicon program.
• Strong analog or mixed-signal technical foundation.
• Solid understanding of analog-front-end architecture and low-noise signal acquisition.
• Experience translating high-level system or product requirements into detailed ASIC specifications.
• Experience reviewing technical simulations, verification results, and architecture tradeoffs.
• Understanding of digital communications, data paths, timing, interfaces, and data integrity.
• Experience developing or reviewing power, noise, data-rate, and signal-integrity budgets.
• Experience with post-silicon bring-up, benchtop characterization, debugging, or failure investigation.
• Experience overseeing external ASIC design firms, semiconductor vendors, contractors, or technical development partners.
• Ability to critically evaluate technical partner work and identify missing analyses, design risks, or unsupported assumptions.
• Strong cross-functional communication and technical-leadership skills.
• Ability to work effectively in a lean, fast-moving engineering organization.