Principal EDA R&D Engineer

NVIDIA Corporation; Santa Clara (CA); Hybride; USD 232 000 - 368 000; Plein temps

Avantages offerts par ce poste

Equity

Benefits

Résumé du poste

NVIDIA seeks an experienced Principal EDA R&D Engineer to pioneer next-generation Hardware Formal Verification tools. Lead research, architecture, and development of core engines, enhanced by Agentic AI frameworks, with multi-agent AI networks to scale large builds and optimize solver strategies.

You'll apply deep algorithmic expertise in formal methods, implement high-performance C/C++ code, and work with RTL languages (SystemVerilog/VHDL/Verilog) to produce production-grade EDA solutions in a

Qualifications

• Ph.D. or Master’s in CS/EE or related quantified field.
• 15+ years of R&D in commercial or advanced academic EDA hardware verification.
• Deep knowledge of formal methods, BMC, IC3/PDR, and theorem proving.
• Expert C/C++ (Modern C++17/20) with performance focus.

Responsabilités

• Architect and advance new formal verification algorithms (Model Checking, SAT/SMT, BDDs).
• Design and deploy multi-agent AI systems that analyze RTL and partition design spaces.
• Develop intelligent orchestration where agents collaborate to bypass state-space explosion.
• Generate SystemVerilog Assertions from natural language specs and architecture intent.
• Drive features from research to production in high-performance C/C++ environments.

Connaissances

C++ (Modern)

Multi-agent AI

Parallel programming

Formation

PhD or MSc in CS/EE

Outils

LangChain

AutoGen

CrewAI

SystemVerilog

VHDL

Verilog

Description du poste

NVIDIA is seeking an experienced Principal EDA R&D Engineer to pioneer the next generation of Hardware Formal Verification tools! In this position, you will lead research, architecture, and development of core formal verification engines improved by Agentic AI frameworks. You will craft collaborative, autonomous AI agent networks to extend formal tools. These tools will automatically break down large builds, coordinate solver strategies, synthesize complex properties, and debug execution traces at an unmatched scale. This role requires deep algorithmic knowledge, rigorous industrial software engineering, and a strong record of producing production-grade EDA tools.

What you’ll be doing:

Architect, construct, and advance brand new formal verification algorithms (e.g., Model Checking, SAT/SMT solvers, BDDs, Equivalence Checking, and Theorem Proving). Design, develop, and deploy multi-agent AI systems (using LLMs, Reinforcement Learning, and Graph Neural Networks) that autonomously analyze RTL topologies, partition large design spaces, and dynamically tune solver parameters. Develop intelligent orchestration layers where autonomous AI agents collaborate to bypass state‑space explosion, handling multi‑billion‑gate builds and deep sequential depth. Develop intelligent engines capable of handling ingestion, abstraction, and the automatic generation of complex System Verilog Assertions (SVA) from natural language specifications and architectural intent. Drive features from initial algorithmic research through implementation in high-performance C/C++ environments, ensuring seamless integration into commercial EDA tool suites.

What we need to see:

Ph.D. or Master’s degree or equivalent experience in Computer Science, Electrical Engineering, Computer Engineering, or a related quantitative field. Minimum of 15 years of professional R&D experience specifically building commercial or advanced academic Electronic Design Automation (EDA) hardware verification tools. Deep mathematical and hands‑on understanding of formal methods, including bounded model checking (BMC), unbounded model checking (PDR/IC3), abstract interpretation, and theorem proving. Expert-level proficiency in C/C++ (Modern C++17/20) passionate about high-performance data structures, memory optimization, and multi‑threading. Proven experience building or researching Agentic AI pipelines, multi‑agent frameworks (e.g., LangChain, AutoGen, CrewAI), tool‑use execution, and prompt‑engineering tailored to structured code or hardware descriptions. Experience with RTL languages (System Verilog, VHDL, Verilog) combined with solid understanding of System Verilog Assertions (SVA).

Ways to stand out from the crowd:

To distinguish yourself, demonstrate a flawless track record of successfully deploying world‑class EDA solutions in high‑stakes environments. Showcase any ambitious projects where you have carefully established innovative answers to complex verification challenges. Highlight experiences that reflect your ability to compete at the highest level and deliver outstanding results.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 232,000 USD - 368,000 USD. You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until September 13, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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