Principal Digital & Mixed-Signal IC Design Engineer

Lumicity; San Francisco (CA); Hybrid; USD 140,000 - 200,000; Full time

Job summary

Lumicity is seeking a Senior/Principal Digital & Mixed-Signal IC Design Engineer in San Francisco, CA. This full-time hybrid role focuses on bridging digital RTL with transistor-level AMS design, guiding architecture through tapeout and silicon bring-up.

You will design RTL in Verilog/SystemVerilog, develop mixed-signal blocks (ADCs/DACs, sensors, monitors), and verify at full-chip level while collaborating with RF, analog, test, and layout teams.

Qualifications

• MS + 5 years or PhD + 2 years of relevant IC design experience.
• Hands-on transistor-level analog/mixed-signal IC design experience.
• Experience with Cadence digital and mixed-signal design/verification tools.

Responsibilities

• Design digital control logic, interfaces, register maps, state machines, and RTL using Verilog/SystemVerilog.
• Develop mixed-signal blocks including ADCs/DACs, sensors, detectors, monitors, and calibration circuitry.
• Perform digital and mixed-signal verification through full-chip integration and tapeout.
• Work closely with RF, analog, test, and layout teams on IC development.
• Support silicon bring-up, characterization, and debugging.

Skills

Digital RTL

Transistor-level AMS design

Full-chip verification

Silicon bring-up

Education

Master's degree in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence digital tools

Cadence mixed-signal tools

Job description

Job Title: Senior/Principal Digital & Mixed-Signal IC Design Engineer

Type: Full-Time | Hybrid

OVERVIEW:

My client is an early-stage semiconductor company developing highly integrated RF and mixed-signal IC technology for next-generation communications applications.

They are looking for a Mixed-Signal IC Design Engineer who can bridge digital RTL and transistor-level mixed-signal design, with ownership extending from architecture and design through verification, tapeout, and silicon bring-up.

KEY RESPONSIBILITIES:

• Design digital control logic, interfaces, register maps, state machines, and RTL using Verilog/SystemVerilog.
• Develop mixed-signal blocks including ADCs/DACs, sensors, detectors, monitors, and calibration circuitry.
• Perform digital and mixed-signal verification through full-chip integration and tapeout.
• Work closely with RF, analog, test, and layout teams on IC development.
• Support silicon bring-up, characterization, and debugging.

QUALIFICATIONS:

• MS + 5 years or PhD + 2 years of relevant IC design experience.
• Hands-on transistor-level analog/mixed-signal IC design experience.
• Experience with Cadence digital and mixed-signal design/verification tools.
• Experience taking an ASIC through tapeout and silicon bring-up.
• RF, mmWave, mixed-signal SoC, DFT/BIST, or calibration experience is beneficial.

Candidates must be U.S. persons (U.S. citizen, permanent resident, asylee, or refugee) or eligible for an export license.