Principal Digital Design Engineer

asteralabs; San Jose (CA); On-site; USD 185,000 - 230,000; Full time

Job summary

Astera Labs is seeking Principal Digital Design Engineers in the United States to lead front-end circuit design for high-performance network controllers. You will work on RTL, synthesis, IP integration, and block-level verification across PCIe, Ualink, Esun, and Ethernet protocols.

Qualifications include a Bachelor's in EE (Master's preferred), 8+ years in SoC/silicon for networking, and expertise with Synopsys/Cadence flows. US work authorization and immediate availability are required.

Qualifications

• Bachelor's degree in EE; Master's preferred.
• +8 years' experience in complex SoC/silicon products for networking/server/storage.
• Strong problem-solving and customer-facing skills.
• Authorized to work in the US and available to start immediately.

Responsibilities

• Develop micro-architecture and front-end circuit design (RTL, synthesis).
• Integrate IP and perform block-level verification for high-performance controllers.
• Own front-end design from architecture to GDS with multiple complex designs.
• Work with Synopsys and Cadence flows; implement DFT and timing closure.
• Participate in silicon bring-up and debug; utilize UVM verification.

Skills

PCIe protocols

Ualink

Esun

Ethernet

Front-end design

RTL

Synthesis

DFT

UVM verification

Silicon bring-up

CMOS 28nm

CPU/GPU/SoC contexts

Education

Bachelor's degree in EE

Master's degree preferred

Tools

Synopsys

Cadence

Job description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com .

Job Description

We are looking for Principal Digital Design Engineers with experience developing micro-architecture and implementation of the front-end circuit design, including RTL, synthesis, IP integration, and block-level verification for high performance network controllers. The candidate must have good knowledge of communication/interface protocols such as PCI-Express (Gen-3 and above), Ualink, Esun, Ethernet etc.

Basic Qualifications

• Strong academic and technical background in electrical engineering. A Bachelor's degree in EE is required, and a Master's degree is preferred.
• +8 years' experience supporting or developing complex SoC/silicon products for Switch ASIC, Networking applications and/or Server, Storage.
• Professional attitude with the ability to prioritize a dynamic list of multiple tasks, plan and prepare for customer meetings in advance, and work with minimal guidance and supervision.
• Entrepreneurial, open-mind behavior and can-do attitude. Think and act fast with the customer in mind!
• Authorized to work in the US and start immediately.

Required Experience

• Hands-on, thorough knowledge of high-speed protocols like PCIe, Ualink, Esun, Ethernet, etc.
• Proven front end design expertise - architecture, RTL, simulations, synthesis, timing closure, GLS, DFT etc.
• Full chip or block level ownership from architecture to GDS, driving multiple complex designs to production
• Experience with Synopsys and/or Cadence digital design tools/flows
• Good knowledge of design for test (DFT), stuck-at and transition scan test insertion
• Familiarity with UVM based design verification
• Silicon bring-up and debug expertise
• Small-geometry CMOS (≤28nm) design

Preferred Experience

• Firmware development with C-language, scripting with Python or other equivalent programming languages.
• Development/support for PCIe or Ethernet Switch products.

The base salary range is $185,000.00 USD - $230,000.00 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.