Principal CAD Engineer

Ampere; Santa Clara (CA); On-site; USD 195,000 - 292,000; Full time

Benefits offered by this job

Health insurance

401K retirement plan

Unlimited flextime

Job summary

Ampere, a leading semiconductor design company, is seeking an experienced Principal CAD Engineer to join a growing Processor Design group. You will develop and maintain physical design flows, focusing on high-performance, energy-efficient AI compute.

You will collaborate with implementation and physical design teams to optimize PPA across projects, analyze the impact of technology changes, and drive scalable automation for advanced nodes.

Qualifications

• Proven experience driving PPA optimization across physical design flows.
• Experience delivering block or chip-level designs with aggressive PPA targets.
• Experience in low power design using UPF/CPF.
• Proficient in scripting with CAD infrastructures and automation for PPA regression.
• Excellent communication and debugging skills.

Responsibilities

• Drive development and continuous improvement of synthesis and physical design methodology with a focus on maximizing PPA.
• Collaborate closely with implementation and physical design teams to optimize PPA metrics across multiple projects.
• Analyze the impact of technology and design changes on PPA at block and full chip level.
• Identify PPA bottlenecks and develop solutions balancing timing, area, power and routability.
• Debug flow issues and implement robust automation for scalable deployment across various advanced technologies and design teams.

Skills

PPA optimization

Physical design experience

UPF/CPF for low power

Hierarchical P&R

Scripting: Tcl/Perl/Python

Automation frameworks

Chip finishing / sign-off

EDA tools familiarity

Strong debugging & analytical skills

Team collaboration

Education

Bachelor's degree in Electrical or Computer Engineering

Tools

Cadence Genus

Cadence Innovus

Mentor Calibre

Job description

Invent the future with us.

Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute.

Description

Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute.

As a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications.

Join us at Ampere and work alongside a passionate and growing team.

About The Role

We are looking for an experienced Principal CAD Engineer to join a small but growing Processor Design group, advancing the art of high-performance implementation and physical design. Ideal candidates will develop and maintain physical design flows for high performance designs and contribute to PPA related methodology changes across multiple projects and technology nodes.

What You’ll Achieve

• Drive development and continuous improvement of synthesis and physical design methodology with a focus on maximizing Power, Performance and Area (PPA)
• Collaborate closely with implementation and physical design teams to optimize PPA metrics across multiple projects
• Analyze the impact of technology and design changes on PPA at block and full chip level
• Identify PPA bottlenecks and develop solutions that balance timing, area, power and routability
• Debug flow issues and implement robust automation for scalable deployment across various advanced technologies and design teams

About You

• Proven experience driving PPA optimization across physical design flows – from synthesis to sign-off at advanced technology nodes
• Success in delivering block or chip-level designs with aggressive PPA targets
• Experience in low power design and implementation techniques using UPF/CPF
• Proficiency in hierarchical P&R, floorplanning, pin-assignment, clock-distribution, critical-signal handling, hierarchical abstractions (black-box, ILM, etc.)
• Proficient in scripting using Tcl, Perl, Python, Makefile, etc
• Expertise in developing scalable CAD infrastructure and automation frameworks for PPA regressions
• Familiar with chip-finishing and sign-off processes including metal-fill, spare-cells, DFM, boundary-cell insertion, etc
• Experience with EDA tools such as Cadence Genus, Innovus, Mentor Calibre, etc
• Excellent communication, analytical and debugging skills
• Electrical or Computer Engineering - Bachelor’s degree & 8 years of related experience; or Master's degree & 6 years; or PhD & 3 years

What We’ll Offer

At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, cash long-term incentive, and comprehensive benefits. The full base pay range for this role is between $195,000 and $292,000.

Our benefits include health, wellness, and financial programs that support employees through every stage of life.

Benefit Highlights Include

• Premium medical insurance, dental insurance, vision insurance, as well as income protection and a 401K retirement plan, so that you can feel secure in your health and financial future.
• Unlimited Flextime and 10+ paid holidays so that you can embrace a healthy work-life balance.
• A variety of healthy snacks, energizing espresso, and refreshing drinks to keep you fueled and focused throughout the day.

And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are excited to share more about our career opportunities with you through the interview process.

Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law.