Principal ASIC Design Engineer

Anysilicon

Town of Texas, Northern (WI, KY)

On-site

USD 180,000 - 240,000

Full time

6 days ago
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Benefits offered by this job

End-to-end ownership of ASIC programs

Job summary

Blue Origin seeks a Principal ASIC Design Engineer to lead the development of advanced space-grade ASICs for space-based communications. You will define architectures and guide implementation across multiple silicon programs.

This role emphasizes leadership, cross-functional collaboration, and rigorous verification to ensure reliability and performance in harsh space environments.

Qualifications

  • BS/MS/PhD in Electrical or Computer Engineering or related field.
  • 12+ years of ASIC design experience, including ownership of complex chips.
  • Expert-level knowledge of digital design and full-chip tradeoffs.
  • Proven success in leading silicon programs.
  • Strong understanding of space-based communication signal-processing hardware.

Responsibilities

  • Define top-level digital architecture for space-based communication ASICs and SoCs.
  • Lead hardware realization of key communication functions such as modem pipelines and digital beamforming.
  • Drive technical planning from concept through silicon validation.
  • Establish system-level tradeoffs among throughput, latency, power, and reliability.
  • Provide technical leadership across design, verification, and system teams.
  • Review architectural partitioning between ASIC, FPGA, software, and RF/analog domains.
  • Develop methodologies and reusable IP strategies to improve project outcomes.
  • Mentor technical leaders and support critical design reviews.
  • Assist in roadmap planning and future product definition.

Job description

Blue Origin is seeking a Principal ASIC Design Engineer to lead the design of advanced ASICs for space-based communication systems. This role involves defining digital architecture, guiding implementation strategies, and making critical technical decisions across silicon programs, all within a collaborative and safety-focused culture.

Responsibilities:

  • Define top-level digital architecture for space-based communication ASICs and SoCs.
  • Lead hardware realization of key communication functions such as modem pipelines and digital beamforming.
  • Drive technical planning from concept through silicon validation.
  • Establish system-level tradeoffs among throughput, latency, power, and reliability.
  • Provide technical leadership across design, verification, and system teams.
  • Review architectural partitioning between ASIC, FPGA, software, and RF/analog domains.
  • Develop methodologies and reusable IP strategies to improve project outcomes.
  • Mentor technical leaders and support critical design reviews.
  • Assist in roadmap planning and future product definition.

Qualifications:

  • BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field.
  • 12+ years of ASIC design experience, including ownership of complex chips.
  • Expert-level knowledge of digital design and full-chip tradeoffs.
  • Proven success in leading silicon programs.
  • Strong understanding of communication signal-processing hardware.

Skills:

  • Deep expertise in space-based communications and digital modems.
  • Experience with advanced FEC architectures and timing recovery.
  • Familiarity with rad-hard and fault-tolerant design techniques.
  • Ability to influence across organizations and communicate complex topics clearly.

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