Pre-Si SoC Power & Thermal Validation Engineer

Intel

Santa Clara (CA)

On-site

USD 122,000 - 232,000

Full time

37 hours ago
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Benefits offered by this job

Stock bonuses
Health benefits
Retirement plan

Job summary

Intel is seeking a SoC Power Thermal Performance Validation and Optimization Engineer to ensure power, thermal, and performance targets are met at the SoC level. You will develop validation methodologies, optimize hardware/software solutions, and perform SoC-level debugging to address power and performance challenges.

The role is part of Intel's Data Center Group (DCG) and the PTP PreSi Correlation Solution team, focusing on validating and optimizing next‑generation data center platforms.

Qualifications

  • Bachelor's in Electrical or Computer Engineering; master's preferred.
  • 3+ years in SoC power and performance validation.
  • 3+ years in Pre-Si simulation and emulation.
  • Experience developing or optimizing power/performance KPIs.

Responsibilities

  • Develop and execute SoC-level power, thermal, and performance validation plans.
  • Collaborate with architecture, design, firmware, and software teams.
  • Validate hardware/software optimizations against KPIs.
  • Perform SoC-level debug to resolve failures.
  • Configure data loggers to collect thermal data.
  • Maintain validation infrastructure and testing environments.
  • Produce validation reports and communicate findings.
  • Drive continuous improvements to validation methodologies.

Skills

SoC power validation
Thermal performance optimization
Python programming
RTL knowledge
Pre-Si simulation
Cross-functional collaboration

Education

Bachelor's in Electrical or Computer Engineering
Master's degree preferred

Tools

Oscilloscope
Logic Analyzer
FPGA Emulation
JTAG Debuggers
Data Loggers

Job description

Intel is seeking a SoC Power Thermal Performance Validation and Optimization Engineer to ensure power, thermal, and performance targets are met at the SoC level. You will develop validation methodologies, optimize hardware/software solutions, and perform SoC-level debugging to address power and performance challenges.

The role is part of Intel's Data Center Group (DCG) and the PTP PreSi Correlation Solution team, focusing on validating and optimizing next‑generation data center platforms.

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