Pre/Post Silicon Validation Engineer

Meta; Sunnyvale (CA); On-site; USD 146,000 - 209,000; Full time

Job summary

Meta's Infrastructure Silicon organization seeks an experienced Silicon Validation Engineer to drive validation across the full silicon lifecycle, from pre-silicon input to post-silicon fleet deployment. You will lead emulation bring-up, debug across hardware, firmware and software, and coordinate with RTL and verification teams to ensure successful tape-out.

The role emphasizes developing automation, managing validation strategies, and improving throughput for large-scale AI/data center silicon

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering or related field.
• 6+ years of ASIC/SoC development cycles with pre/post-silicon validation, hardware verification, or FPGA-based emulation.
• Experience debugging hardware-software interactions using waveform viewers, logic analyzers, or hardware probes.
• Proficiency with ASIC design/development, emulation, and post-silicon validation.
• Experience developing automation scripts and test infra in Python, C/C++.
• Strong collaboration across RTL, firmware, software, and systems teams in a custom silicon environment.

Responsibilities

• Deliver reliable, performant silicon from design input to post-silicon deployment.
• Define and execute silicon validation strategies, test plans, and regression frameworks.
• Develop and maintain emulation infrastructure, including FPGA-based bring-up and configuration.
• Map RTL designs onto emulation platforms optimizing timing and debug visibility.
• Build software/automation for validation workflows, including debug tooling and results analysis.
• Debug hardware, firmware, and software interactions across RTL, firmware, and software layers.
• Root-cause and remediate silicon issues across the product lifecycle.
• Collaborate with RTL and verification engineers to resolve bugs before tape-out.

Skills

Python

C/C++

Education

Bachelor's degree in CS/Engineering

Tools

FPGA emulation

Emulation platforms

Job description

Summary:

Meta's Infrastructure Silicon organization is building custom ASICs to power the compute demands of AI, data center, and next-generation platform workloads. We are looking for an experienced Silicon Validation Engineer to join our team, working across the full silicon lifecycle from early pre-silicon design input and FPGA emulation to post-silicon bring-up, characterization, and deployment in the production fleet. You will play a central role in validating custom silicon, driving emulation bring-up, and leading debug efforts across hardware, firmware, and software layers to ensure successful product delivery. Your work will directly influence the reliability and performance of Meta's custom infrastructure chips at scale.

Required Skills:

Pre/Post Silicon Validation Engineer Responsibilities:

1. Work across all aspects of the silicon lifecycle to deliver reliable, performant silicon - from early architecture and design input, through pre-silicon test readiness and validation, to post-silicon bring-up, characterization, and fleet deployment

2. Define and execute silicon validation strategies, including test plans, coverage models, regression frameworks, and productization readiness criteria

3. Develop and maintain emulation infrastructure for custom silicon, including FPGA-based emulation platform bring-up and configuration

4. Partition and map RTL designs onto emulation platforms, optimizing for timing closure, resource utilization, and debug visibility

5. Build and maintain software, scripting, and automation infrastructure for validation and emulation workflows, including silicon diagnostics, performance analysis, debug tooling, job scheduling, and results analysis across bare-metal and full-stack systems

6. Debug complex hardware, firmware, and software interactions across RTL, firmware, and software layers

7. root-cause, resolve, and remediate silicon issues across the product lifecycle

8. Partner with RTL design and verification engineers to identify and resolve functional bugs prior to tape-out

9. Ensure continuity between pre- and post-silicon environments so that emulation accurately models silicon behavior and validation content transitions cleanly into lab and data center bring-up

10. Understand production system use cases to improve silicon validation, and feed insights from the production fleet back into next-generation architecture and design

11. Evaluate and integrate new validation and emulation tools, methodologies, and platform capabilities to improve throughput and debug efficiency

12. Lead end-to-end validation efforts, driving strategy, planning, execution, and post-silicon enablement and provide technical guidance to peers on validation methodology, debug techniques, and infrastructure best practices

Minimum Qualifications:

Minimum Qualifications:

1. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

2. 6+ years of experience in ASIC/SoC development cycles with pre-silicon and/or post-silicon validation, hardware verification, or FPGA-based emulation for custom silicon

3. Experience troubleshooting, debug, and analytics for silicon products, including debugging hardware-software interactions using waveform viewers, logic analyzers, and hardware debug probes

4. Experience with ASIC design or development, emulation, and post-silicon validation

5. Experience developing automation scripts and test infrastructure in Python, C/C++,,

6. Experience collaborating with internal and external partners across RTL design, verification, firmware, software, and systems teams in a custom silicon environment

Preferred Qualifications:

Preferred Qualifications:

1. Experience with RTL partitioning, FPGA synthesis, and timing closure on large-scale emulation platforms such as Palladium, Veloce, or Zebu

2. Experience working with emulation/FPGA platforms for test content development, debug, and post-silicon enablement

3. Experience with post-silicon bring-up and transitioning validation content from emulation to silicon environments

4. Familiarity with SystemVerilog, UVM, or formal verification methodologies as complements to emulation-based validation

5. Experience with hardware description and simulation tools such as VCS, Xcelium, or Questa

6. Experience with infrastructure or data center silicon domains such as networking ASICs, AI accelerators, or storage controllers

7. Experience with some of the following modules/domains: PCIe, Networking, Ethernet, Flash, Memory, CPU, GPU, DRAM (LP/DDR4/5 and/or HBM)

8. Understanding of embedded systems, including common bus protocols such as I2C, SPI, USB, and/or PCIe

9. Experience with Linux systems and server systems management

10. Experience in application and host driver development, including RDMA Gen Driver, DPDK, or Meta RoCE/RoCEv2, for NIC product validation

Public Compensation:

$146,000/year to $209,000/year + bonus + equity + benefits

Industry:

Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affimative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [e-mail].