Power-Optimized Design Engineer | RTL to GDSII

H R PUNDITS INC

Austin (TX)

On-site

USD 140,000 - 145,000

Full time

14 days+

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Job summary

H R PUNDITS INC is seeking a Design Engineer III in Austin, Texas, to conduct thorough power analysis from RTL to GDSII, improve automation flows, and collaborate with the RTL design team. The ideal candidate should have a Bachelor's degree in Electrical Engineering or Computer Science and solid experience with low-power implementation and scripting in Python. The salary is competitive, ranging from $140K to $145K, reflecting the expertise required in industry-standard tools and innovative design practices.

Qualifications

  • Demonstrated experience with RTL-to-GDSII design flow usage and development in advanced technology nodes (7nm and below).
  • Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage.
  • Proven experience in power analysis and reduction utilizing industry-standard tools such as PrimeTime PX/PrimePower.
  • Proficiency in scripting languages, with a strong emphasis on Python and ML/AI frameworks.
  • Working knowledge of RTL design principles.
  • Experience in RTL power optimization using specialized tools like Power-Artist.
  • Ability to learn quickly, explore new ideas, and iterate rapidly to achieve optimal results.

Responsibilities

  • Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII.
  • Contribute to the development, improvement, and automation of various power analysis flows.
  • Investigate and address power inefficiencies, providing actionable feedback to the RTL design team.

Skills

Power analysis and reduction (with industry tools)
RTL-to-GDSII flow and low-power implementation
Python scripting and ML/AI for automation and modeling

Education

Bachelor degree in Electrical/Computer Engineering or Computer Science

Tools

PrimeTime PX/PrimePower
Power-Artist

Job description

H R PUNDITS INC is seeking a Design Engineer III in Austin, Texas, to conduct thorough power analysis from RTL to GDSII, improve automation flows, and collaborate with the RTL design team. The ideal candidate should have a Bachelor's degree in Electrical Engineering or Computer Science and solid experience with low-power implementation and scripting in Python. The salary is competitive, ranging from $140K to $145K, reflecting the expertise required in industry-standard tools and innovative design practices.
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