Design Engineer

Creospan Inc.; Austin (TX); On-site; USD 90,000 - 130,000; Full time

Job summary

A leading technology firm in Austin, TX is seeking an experienced professional for a technical role focusing on power analysis and optimization. You will analyze power flows, develop and improve automation processes, and work with the design team to address inefficiencies. Ideal candidates will have experience with low-power implementation, RTL design, and proficiency in relevant tools and scripting languages. This position is onsite and requires W2 candidates who can operate without sponsorship.

Qualifications

• Experience with RTL-to-GDSII design flow in advanced technology nodes (7nm and below).
• Expertise in low-power design and signoff.
• Proficiency in scripting languages, especially Python.

Responsibilities

• Perform power analysis at various design stages.
• Develop and improve power analysis flows.
• Address power inefficiencies, providing feedback to the design team.

Skills

Low-power implementation

Power analysis tools (PrimeTime PX/PrimePower)

Scripting (Python)

Machine Learning framework knowledge

Data analysis

Tools

Power-Artist

RTL design tools

Job description

Creospan is a growing tech collective of makers, shakers, and problem solvers, offering solutions today that will propel businesses into a better tomorrow. “Tomorrow’s ideas, built today!” In addition to being able to work alongside equally brilliant and motivated developers, our consultants appreciate the opportunity to learn and apply new skills and methodologies to different clients and industries.

******NO C2C/3RD PARTY, LOOKING FOR W2 CANDIDATES ONLY, must be able to work in the US without sponsorship now or in the future***

Job Location: Onsite in Sunnyvale, CA or Austin, TX

Responsibilities

• Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII.
• Contribute to the development, improvement, and automation of various power analysis flows.
• This includes gathering and analyzing large datasets for power modeling via automated processes.
• Investigate and address power inefficiencies, providing actionable feedback to the RTL design team.

Minimum Qualifications

• Demonstrated experience with RTL-to-GDSII design flow usage and development in advanced technology nodes (7nm and below).
• Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage.
• Proven experience in power analysis and reduction utilizing industry-standard tools such as PrimeTime PX/PrimePower.
• Proficiency in scripting languages, with a strong emphasis on Python and ML/AI frameworks.
• Working knowledge of RTL design principles.
• Experience in RTL power optimization using specialized tools like Power-Artist. Ability to learn quickly, explore new ideas, and iterate rapidly to achieve optimal results.

Preferred Qualifications

• Experience with synthesis and Place and Route (PnR) flows.
• Experience analyzing Intellectual Property (IP) design for power characteristics and building run-time estimation models for use by software/firmware teams.
• Skills in data analysis and data modeling, including the application of machine learning approaches.