Power Engineer

Socket.dev; Austin (TX); On-site; USD 140,000 - 190,000; Full time

Job summary

Apple Inc. in Austin, Texas is seeking an engineer to drive budgeting, measurement, and analysis of CPU power.

You will work closely with micro-architects, RTL, and design teams to identify power reduction opportunities and optimize operating points for power efficiency. Responsibilities include defining traces and metrics for power tracking, collaborating with CAD teams for optimization, and modeling CPU power contribution with the SOC team.

Qualifications

• Master’s degree or foreign equivalent in Electrical and Electronic Engineering or related field.
• Experience with Synopsys PrimePower for power analysis and optimization tasks.
• Experience performing RTL-based power analysis to evaluate design power consumption.
• Experience developing CPU power budgets to meet power targets.
• Experience creating CPU power projections across operating scenarios.
• Knowledge of CPU microarchitecture and its impact on power decisions.
• Ability to write scripts to automate engineering workflows.
• Experience using physical design flows to analyze power at gate level.
• Ability to compare power efficiency across multiple projects.

Responsibilities

• Drive budgeting, measurement, and analysis of overall CPU power.
• Collaborate with Micro-architects, RTL, physical designers, library and technology teams to identify power reduction opportunities.
• Define traces and metrics to track power for various use cases.
• Optimize design operating points and power efficiency in collaboration with the design implementation team.
• Partner with CAD and driving tools/methodologies for power optimization.
• Work with the SOC team to model and optimize CPU contribution of power.

Skills

Power analysis

RTL power analysis

CPU power budgeting

Power optimization

Scripting

Colaboration with CAD/RTL/SOC teams

Education

Master’s degree in Electrical and Electronic Engineering or related field

Tools

Synopsys PrimePower

Job description

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Austin, Texas. Drive the budgeting, measurement, and analysis of overall CPU power. Work extensively with Micro-architects, RTL, physical designers, library and technology teams to study and drive power reduction opportunities. Collaborate closely with Micro-architect and RTL team to define traces and metrics of interest to track power for various use cases. Work with the design implementation team and optimize design operating points and power efficiency. Partner with CAD and driving tools and methodologies for power optimization. Collaborate closely with the SOC team to model and optimize CPU contribution of power. 40 hours/week.

Minimum Qualifications

• Master’s degree or foreign equivalent in Electrical and Electronic Engineering or related field and 5 years of experience in the job offered or related occupation.Experience and/or education must include:
• Working with Synopsys© Prime Power for power analysis and optimization tasks.
• Performing RTL-based power analysis to evaluate design power consumption.
• Developing and managing CPU power budgets to ensure designs meet power targets.
• Creating CPU power projections to forecast power consumption across different operating scenarios.
• Analyzing and understanding CPU microarchitecture to inform design decisions and optimizations.
• Writing scripts and developing programs to automate engineering workflows and analysis tasks.
• Utilizing physical design flows and tools to analyze power consumption at gate level.
• Utilizing power efficiency analysis for a project and comparison to all previous projects.
• Working with physical design implementation team on pre-silicon dynamic and leakage power convergence including efficient clocking structures and power aware data path optimization

Preferred Qualifications

N/A