Postdoctoral Fellow (PREP0004276)

The Chronicle Of Higher Education, Inc.; Gaithersburg (MD); On-site; USD 70,000 - 89,000; Full time

Benefits offered by this job

Comprehensive rewards package

Job summary

The Chronicle Of Higher Education, Inc. is seeking a Pre-Professional Research Experience (PREP) Research Associate for a CHIPS funded project at Johns Hopkins University. This position involves supporting scientific research related to semiconductor advanced packaging. The ideal candidate will have a PhD and significant experience in semiconductor device fabrication and characterization techniques. The benefits include a comprehensive rewards package to support health, life, and career development.

Qualifications

• PhD in physics, electrical engineering, materials science, or a related field required.
• Experience in semiconductor device fabrication essential.
• Proficiency in programming languages such as Python, Java, or MATLAB.

Responsibilities

• Fabricate Si, SiO₂, and SiN chips for experiments.
• Optimize fabrication processes, including cleaning protocols.
• Perform surface characterization of chips for bonding experiments.
• Coordination with teams on materials characterization and modeling.

Skills

Semiconductor device fabrication

Programming with Python

Communication skills

Teamwork

Education

PhD in physics, electrical engineering, materials science

Tools

AFM

SEM

Optical microscopy

Lithography techniques

Job description

Position

Pre-Professional Research Experience (PREP) Research Associate – CHIPS Funded Project

Salary

$70,000 – $89,000

Location

Johns Hopkins University, Whiting School of Engineering, Office of Research and Translation

Job Description

PREP Research Associate CHIPS Funded Project. This position is part of the National Institute of Standards and Technology (NIST) Professional Research Experience (PREP) program. The role will support scientific research through technical work that underpins the collaboration between NIST and Johns Hopkins University.

Research Title: Metrology of Materials, Surfaces, and Processes for Semiconductor Advanced Packaging.

The role will develop novel surface and materials metrology methods to enable predictive control of bonding processes and heterogeneous integration. The successful candidate will work within the Nanophotonics project to establish quantitative foundations needed for reliable, high‑density microelectronic assembly, supporting national efforts to strengthen U.S. leadership in semiconductor manufacturing and advanced packaging technologies.

Responsibilities

• Fabricate Si, SiO₂, and SiN chips for flip‑chip fusion and hybrid‑bonding experiments.
• Optimize and maintain fabrication processes, including chip handling and cleaning protocols.
• Perform surface and thin‑film characterization of chips used for flip‑chip bonding experiments. Characterization techniques include AFM, optical inspection, IR transmission microscopy, spectroscopic ellipsometry, SEM, and others.
• Closely coordinate with teams performing materials characterization, bond‑strength testing, and modeling.

Qualifications

• PhD in physics, electrical engineering, materials science, or a related field.
• Significant experience in semiconductor device fabrication, including wafer cleaning and handling, lithography mask layout, optical or electron beam lithography, RIE, ICP RIE, PVD, CVD, ALD, wet etching, and characterization techniques such as ellipsometry, profilometry, optical microscopy, SEM, and AFM.
• Proficiency in programming languages such as Python, Java, or MATLAB.
• Excellent communication skills and ability to work effectively in a team.

Desirable Qualifications

• Experience with flip‑chip fusion and/or hybrid bonding processes.
• Experience with XPS, UPS, FTIR, Raman, photoluminescence, and other relevant spectroscopy modalities.
• Familiarity with silicon electronic, photonic, or optoelectronic device processing.
• Experience with custom infrared microscopy and optical measurement setups.
• Experience with III‑V compound semiconductor process development and device fabrication.
• Experience with optoelectronic device characterization (e.g., semiconductor lasers, detectors, multi‑functional photonic integrated circuits).
• Experience with photonic and optoelectronic device simulation software such as Lumerical, Tidy3d, or COMSOL.
• US citizenship strongly preferred.

Benefits

Johns Hopkins offers a total rewards package that supports employees' health, life, career, and retirement.

Equal Employment Opportunity Statement

The Johns Hopkins University is committed to equal opportunity for its faculty, staff, and students. To that end, the university does not discriminate on the basis of sex, gender, marital status, pregnancy, race, color, ethnicity, national origin, age, disability, religion, sexual orientation, gender identity or expression, veteran status or other legally protected characteristic. The university is committed to providing qualified individuals access to all academic and employment programs, benefits and activities on the basis of demonstrated ability, performance, and merit without regard to personal factors that are irrelevant to the program involved.