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Cadence is seeking a Post-Silicon Validation Engineering Intern to work on-site in San Jose, California. In this role, you will validate system-level and electrical performance of internal silicon test chips while collaborating closely with analog and digital design teams.
The ideal candidate should have a Bachelor’s or master’s degree in electrical engineering and possess strong analytical skills. Experience in the semiconductor industry and scripting for test automation is a plus.
Cadence is seeking a Post-Silicon Validation Engineering Intern to work on-site in San Jose, California. In this role, you will validate system-level and electrical performance of internal silicon test chips while collaborating closely with analog and digital design teams.
The ideal candidate should have a Bachelor’s or master’s degree in electrical engineering and possess strong analytical skills. Experience in the semiconductor industry and scripting for test automation is a plus.