Post silicon validation engineer

Broadcom; San Jose (CA); On-site; USD 108,000 - 172,800; Full time

Benefits offered by this job

Discretionary annual bonus

401(K) participation with company matching

Employee Stock Purchase Program (ESPP)

Job summary

Broadcom is seeking a Post-Silicon Validation Engineer in San Jose, California. This role involves driving the bring-up and validation of next-generation Ethernet and PCIe Retimer chips, ensuring compliance with rigorous networking standards.

The ideal candidate has extensive experience in Ethernet PHY and strong programming skills in Python and C/C++. A competitive salary and comprehensive benefits package are offered. Join Broadcom's innovative team!

Qualifications

• 8+ years of related experience or 6+ years with a Master's degree.
• Expertise in Ethernet PHY architecture and protocols.
• Strong Python and C/C++ programming skills.

Responsibilities

• Drive bring-up and validation of high-speed Retimer chips.
• Validate compliance with IEEE and PCI-SIG standards.
• Root-cause complex silicon and firmware issues.

Skills

Ethernet Domain Knowledge

Python

C/C++

Lab Equipment Proficiency

Education

Bachelors in Engineering

Masters degree in Engineering

Tools

High-bandwidth oscilloscopes

Ethernet Traffic Generators

PCIe analyzers

Job description

Job Description

We are seeking a Post-Silicon Validation Engineer to drive the bring‑up, characterization, and debugging of our next‑generation Ethernet and PCIe Retimer chips. This role heavily focuses on advanced Ethernet physical layer (PHY) validation, ensuring our silicon meets rigorous IEEE networking standards and high‑speed interoperability requirements.

Key Responsibilities

• Ethernet & PCIe Validation: Hands‑on bring‑up of multi‑rate Retimer ICs.
• Compliance & Interoperability: Validate Ethernet (100G/400G/800G) and PCIe (Gen 5/6) for IEEE and PCI‑SIG compliance.
• Automation: Build Python‑based automated test frameworks for Ethernet throughput, BER, and control path testing which includes ARM based micros and GPIO/MDIO/I2C protocols.
• Network Debugging: Root‑cause complex silicon, link training, and firmware bugs using protocol analyzers and traffic generators.

Technical Qualifications

• Ethernet Domain Knowledge: Expertise in Ethernet PHY architecture, PAM4/NRZ signaling, FEC (Forward Error Correction), Auto‑Negotiation, and Link Training.
• Lab Equipment: Proficiency with high‑bandwidth oscilloscopes, BERTs, Ethernet Traffic Generators/Network Analyzers (e.g., Ixia, Spirent), and PCIe analyzers.
• Programming/Scripting: Strong Python for lab automation and data analysis, plus C/C++ for low‑level register manipulation.

Education and Experience

Bachelors in Engineering and 8+ years of related experience or Masters degree in Engineering and 6+ years of related experience.

Compensation and Benefits

The annual base salary range for this position is $108,000 - 172,800. This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements. Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Equal Opportunity Employment

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.