Enable job alerts via email!

Post Silicon Validation Engineer

The Rundown AI, Inc.

Mountain View (CA)

Remote

USD 181,000 - 366,000

Full time

14 days ago

Boost your interview chances

Create a job specific, tailored resume for higher success rate.

Job summary

A leading company is looking for a Post Silicon Validation Engineer, who will drive the quality and reliability of their advanced AI accelerator. The role involves various validation tasks and mentoring junior engineers while working collaboratively within a dynamic team. Ideal candidates will possess strong problem-solving skills and silicon validation experience in high-speed interfaces.

Qualifications

  • Experience in system marginality validation is a plus.
  • Good understanding of high-speed interfaces is required.
  • Laboratory experience with hands-on equipment is necessary.

Responsibilities

  • Validate and optimize performance of high-speed interface designs.
  • Develop software test applications for product screening.
  • Conduct root cause analysis and mentor junior engineers.

Skills

Silicon validation experience
Problem-solving skills
Communication skills
Knowledge of measurement techniques

Education

BE or ME Graduate

Tools

Oscilloscope
Logic analyzer
High speed scopes
Spectrum analyzers
BERTs

Job description

Post Silicon Validation Engineer

Mission:drive and yield, quality & reliability for the most advanced AI accelerator on the market.

Responsibilities & opportunities in this role:

  • Bring-up & Silicon Characterization
  • Validation of C2C, PCIe, CXL, DDRx, LPDDR controller/chips
  • Validation of SRAM and Vmin optimization
  • Scripting and test data processing to extract meaningful signals
  • Develop and integrate software test applications for effective product stress and SLT screening and collaborate with software teams to evaluate system performance and HW/SW interaction under various conditions.
  • SLT test time optimization, including shift right strategies STL to ATE
  • Test time, DPM, & yield optimization for effective production screens
  • Root cause analysis and RMA processing
  • Mentor Junior Engineers when the project need arises
  • Experience in Post Silicon Electrical Validation of server processors (if server processor is too specific, you can remove server)

Ideal candidates have/are:

  • Silicon validation experience, preferably in the area of SERDES, DDR or high-speed interface design. BE or ME Graduate
  • Experience in system marginality validation
  • Good understanding of lab equipment and measurement techniques for high-speed interfaces. High speed scopes, probes, spectrum analyzers, BERTs.
  • Knowledge of board and package design, signal integrity and power integrity a plus
  • Knowledge of DDR trainings and memory system operation a plus
  • Software proficiency for python test scripting, data handling and reporting
  • Laboratory experience, including hands-on use of equipment: oscilloscope, logic analyzer, etc.
  • Excellent problem-solving skills, good communication skills and ability to work cooperatively in a team environment
  • Debug issues with SOC IP and boards as needed.

Attributes of a Groqster:

  • Humility - Egos are checked at the door
  • Collaborative & Team Savvy - We make up the smartest person in the room, together
  • Growth & Giver Mindset - Learn it all versus know it all, we share knowledge generously
  • Curious & Innovative - Take a creative approach to projects, problems, and design
  • Passion, Grit, & Boldness - no limit thinking, fueling informed risk taking

If this sounds like you, we’d love to hear from you!

Compensation: At Groq, a competitive base salary is part of our comprehensive compensation package, which includes equity and benefits. For this role, the base salary range is $181,700 to $365,400, determined by your skills, qualifications, experience and internal benchmarks.

#LI-Remote

Get your free, confidential resume review.
or drag and drop a PDF, DOC, DOCX, ODT, or PAGES file up to 5MB.

Similar jobs

Senior Staff Post-Silicon Validation Engineer

Marvell Semiconductor, Inc.

Santa Clara

On-site

USD 121,000 - 182,000

2 days ago
Be an early applicant

Lead Post-Silicon Validation Engineer

NVIDIA

Santa Clara

On-site

USD 192,000 - 368,000

12 days ago

Principal Engineer - Silicon Validation Engineer

Davita Inc.

Santa Clara

On-site

USD 143,000 - 215,000

Yesterday
Be an early applicant

PMU Silicon Validation Engineer

Apple

Cupertino

On-site

USD 143,000 - 265,000

9 days ago

Principal Validation Engineer

Davita Inc.

Santa Clara

On-site

USD 143,000 - 215,000

Yesterday
Be an early applicant

Wireless Validation Engineer (Wi-fi & Bluetooth)

Davita Inc.

San Francisco

On-site

USD 200,000 - 250,000

Yesterday
Be an early applicant

Product Validation Engineer Sunnyvale, CA • Software Engineering • Engineering Sunnyvale, CA So[...]

Meta

Sunnyvale

On-site

USD 178,000 - 190,000

6 days ago
Be an early applicant

GPU Validation Engineer

Intel

Santa Clara

Hybrid

USD 161,000 - 228,000

8 days ago

Principal Hardware Validation Engineer

Marvell Semiconductor, Inc.

Santa Clara

On-site

USD 143,000 - 215,000

11 days ago