Physical Design Engineer, Annapurna Labs

Anysilicon; Austin, Northern (TX, KY); Hybrid; USD 120,000 - 170,000; Full time

Job summary

Annapurna Labs, part of AWS, is seeking an ASIC Physical Design Engineer in the Annapurna Labs group to drive physical design closure for cutting-edge cloud silicon and accelerators. You will work with RTL and architecture teams to optimize power, performance, and area while leading IO/Core implementations and sign-off activities.

The role emphasizes collaboration, use of advanced physical design tools, and refining design methodologies to deliver reliable silicon for next‑gen AWS services.

Qualifications

• Collaborate with RTL/logic designers to assess power-performance-area tradeoffs for physical design.
• Lead physical implementation of IO/Core blocks through synthesis, floor planning, P&R, and power/clock distribution.
• Perform congestion analysis, timing closure, IR drop analysis, physical verification, ECO, and sign-off processes.
• Develop and refine physical design methodologies.
• Evaluate third-party IP and provide informed recommendations.
• Foster a collaborative environment with other physical design engineers and RTL/Architecture teams.

Responsibilities

• Collaborate with RTL/logic designers to conduct architectural feasibility studies and assess power-performance-area tradeoffs for physical design closure.
• Lead the physical implementation of IO/Core blocks through synthesis, floor planning, bus/pin planning, place and route, and power/clock distribution.
• Perform congestion analysis, timing closure, IR drop analysis, physical verification, ECO, and sign-off processes.
• Develop and refine physical design methodologies.
• Evaluate third-party IP and provide informed recommendations.
• Foster a collaborative environment with other physical design engineers and RTL/Architecture teams.

Skills

Collaboration

Physical design tools

ASIC design processes

Education

Bachelor's degree in Electrical Engineering

Tools

Place & Route tools

Job description

Physical Design Engineer, Annapurna Labs

Join AWS Utility Computing (UC) as an ASIC Physical Design Engineer, where you'll contribute to the development and management of cutting-edge cloud services, including specialized security solutions and generative AI offerings. Be part of Annapurna Labs, focusing on silicon and software innovations that empower customers to tackle unprecedented challenges with custom chips and accelerators.

Responsibilities:

• Collaborate with RTL/logic designers to conduct architectural feasibility studies and assess power-performance-area tradeoffs for physical design closure.
• Lead the physical implementation of IO/Core blocks through synthesis, floor planning, bus/pin planning, place and route, and power/clock distribution.
• Perform congestion analysis, timing closure, IR drop analysis, physical verification, ECO, and sign-off processes.
• Develop and refine physical design methodologies.
• Evaluate third-party IP and provide informed recommendations.
• Foster a collaborative environment with other physical design engineers and RTL/Architecture teams.

Qualifications:

• Bachelor's degree in Electrical Engineering or a related field.
• Proven experience in identifying bugs in architecture, algorithms, functionality, and performance with strong debugging skills.
• Experience in verifying at multiple levels of logic.

Skills:

• Strong collaboration and teamwork abilities.
• Expertise in physical design tools and methodologies.
• Knowledge of ASIC design processes and best practices.

Find the Right Semiconductor Partner

• ASIC Design Services
• Verification
• Packaging & Wafer
• Semiconductor IP

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