Photonic Layout Engineer - Hybrid Work + Stock Options

Physics World; College Park (MD); On-site; USD 120,000 - 160,000; Full time

Benefits offered by this job

IonQ stock options

Annual performance bonus

Flexible hybrid working

Private medical and dental insurance

Job summary

IonQ in College Park, MD, is seeking a Photonic Layout Engineer to design photonic integrated circuits for quantum processors. You will align with scientists and fabrication engineers to integrate photonic components, drive layout of multi-layer chips, and accelerate tape-out for scalable qubit devices.

Responsibilities include arranging and routing photonic elements, developing reticle-size layout files with Python scripts, and contributing to custom layout PDks while validating designs with

Qualifications

• Experience in design and layout of Photonic Integrated Circuits (PICs).
• Ability to interpret chip requirements and complexities in layout.
• 2+ years using Python for photonic mask layout (Luceda IPKISS, GDSFactory, Klayout).
• Degree in Photonics, Physics, EE or related field.
• Strong collaboration and independent prioritization in fast-paced environments.

Responsibilities

• Layout photonic components on multi-layer chips and tape-out files.
• Collaborate with scientists and design/fabrication teams to define layout rules.
• Perform DRC/LVS validation and contribute to PDKs.
• Document layout processes and final mask files.

Skills

Photonic IC layouts

Python for photonics

Chip/tape-out coordination

Strong collaboration

Education

Photonics/Physics/EE degree

Tools

Luceda IPKISS

GDSFactory

Klayout

Synopsys

Cadence

Ansys

Job description

IonQ in College Park, MD, is seeking a Photonic Layout Engineer to design photonic integrated circuits for quantum processors. You will align with scientists and fabrication engineers to integrate photonic components, drive layout of multi-layer chips, and accelerate tape-out for scalable qubit devices.

Responsibilities include arranging and routing photonic elements, developing reticle-size layout files with Python scripts, and contributing to custom layout PDks while validating designs with