Photonic IC Layout Engineer for Quantum Chips

Ionq; Bothell (WA); On-site; USD 140,000 - 200,000; Full time

Benefits offered by this job

IonQ stock options

Annual performance bonus

Generous annual leave

Flexible hybrid working

Medical and dental insurance

Job summary

IonQ is seeking a Photonic Layout Engineer to join the QPU Design team. You will arrange and route photonic components on multi-layer chips and produce reticle-size layout files for tape-out, collaborating with scientists and fabrication engineers to advance quantum processor design.

Ideal candidates have 2+ years of Python for photonics, experience with PICs and waveguides, and a degree in Photonics, Physics, or Electrical Engineering.

Qualifications

• Significant experience in design and layout of photonic integrated circuits (PICs).
• Ability to interpret requirements from other chip areas and translate to layout.

Responsibilities

• Layout photonic components on multi-layer chips and integrate into tape-out flow.
• Coordinate with scientists, photonic designers, test and fabrication engineers for design rules.
• Perform layout verification (DRC/LVS) and contribute to PDK development.
• Document layout processes and final tape-out mask files.

Skills

PIC layouts

Python scripting

Cross-functional collaboration

Independent time management

DRC/LVS familiarity

Education

Degree in Photonics/Physics/EE

Tools

Luceda IPKISS

GDSFactory

KLayout

Job description

IonQ is seeking a Photonic Layout Engineer to join the QPU Design team. You will arrange and route photonic components on multi-layer chips and produce reticle-size layout files for tape-out, collaborating with scientists and fabrication engineers to advance quantum processor design.

Ideal candidates have 2+ years of Python for photonics, experience with PICs and waveguides, and a degree in Photonics, Physics, or Electrical Engineering.