PhD Research Intern: AI Hardware & VLSI Co-Design

NVIDIA; United States; On-site; USD 52,000 - 129,000; Full time

Benefits offered by this job

Intern benefits

Job summary

NVIDIA Research seeks PhD-level interns to explore AI hardware/software co-design, accelerator architecture, and VLSI design methodologies. You’ll work with a cross-disciplinary team on novel testchips and prototype flows.

The role emphasizes publishing results at ML/architecture/VLSI venues, collaborating with AI researchers and hardware engineers, and applying Python/PyTorch and SystemVerilog/C++ in design and verification.

Qualifications

• Pursuing a PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• Publication records in ML, architecture, VLSI, or circuits conferences.
• Excellent programming in Python/PyTorch and hardware design languages such as SystemVerilog/C++; Experience with High-Level Synthesis (HLS) tools is a plus.
• VLSI implementation experience with modern EDA tool flows; Tapeout experience is a plus.
• Excellent self-motivation, creativity, and ability to collaborate in a research team.
• Excellent written and verbal communication skills with experience presenting technical work.

Responsibilities

• Accelerator design: contribute to research advancing AI accelerators and high-impact workloads.
• VLSI: develop ASIC/VLSI design techniques and digital circuits; apply ML and AI methodologies to design tool flows.
• AI HW/SW co-design: develop numerical methods for quantization, sparsity, or tensor decomposition grounded in computer arithmetic and VLSI.
• Collaborate on development of research prototype testchips.
• Collaborate with AI researchers and hardware team members in research and product teams.
• Plan to publish and present original research.

Skills

Python

PyTorch

SystemVerilog

C++

Education

PhD candidate in Electrical Engineering/Computer Engineering/Computer Science

Tools

SystemVerilog

C++

HLS tools

Job description

NVIDIA Research seeks PhD-level interns to explore AI hardware/software co-design, accelerator architecture, and VLSI design methodologies. You’ll work with a cross-disciplinary team on novel testchips and prototype flows.

The role emphasizes publishing results at ML/architecture/VLSI venues, collaborating with AI researchers and hardware engineers, and applying Python/PyTorch and SystemVerilog/C++ in design and verification.