PhD Research Intern: AI/Hardware Co-Design & VLSI

NVIDIA Corporation; Santa Clara (CA); On-site; USD 52,000 - 129,000; Full time

Benefits offered by this job

Intern benefits

Job summary

NVIDIA Research is seeking PhD-level students to work as research interns at the intersection of AI HW/SW Co-Design, Hardware Accelerator Architecture, IC Design Methodology, and VLSI Design. Ideal candidates will have broad perspective across ML fundamentals, quantization, and digital VLSI circuits for arithmetic and accelerator design.

Responsibilities include contributing to novel accelerator and VLSI techniques, applying ML methods to design tool flows, and collaborating with AI researchers

Qualifications

• Pursuing a PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• Publication records in ML, architecture, VLSI, or circuits conferences.
• Excellent programming skills in Python/PyTorch and hardware design languages such as SystemVerilog/C++; experience with HLS tools is a plus.
• VLSI implementation skills with modern EDA tool flows; tapeout experience is a plus.
• Excellent self-motivation, creativity, and collaboration skills; ability to work in a research team.
• Strong written and verbal communication with experience presenting technical work.

Responsibilities

• Accelerator Design: contribute to research advancing accelerators for AI and other workloads.
• VLSI: explore ASIC/VLSI design techniques, apply ML, agentic AI to design tool flows.
• AI HW/SW Co-Design: develop numerical methods for quantization, sparsity, or tensor decomposition; collaborate on testchips; publish results.

Skills

Python/PyTorch

SystemVerilog/C++

HLS tools experience

Research collaboration

Education

PhD in Electrical/Computer Engineering or Computer Science

Tools

High-Level Synthesis (HLS) tools

EDA tool flows

Job description

NVIDIA Research is seeking PhD-level students to work as research interns at the intersection of AI HW/SW Co-Design, Hardware Accelerator Architecture, IC Design Methodology, and VLSI Design. Ideal candidates will have broad perspective across ML fundamentals, quantization, and digital VLSI circuits for arithmetic and accelerator design.

Responsibilities include contributing to novel accelerator and VLSI techniques, applying ML methods to design tool flows, and collaborating with AI researchers