PhD Intern: AI Accelerator Memory Systems

Micron

Folsom (CA)

On-site

USD 69,000 - 83,000

Full time

10 days ago
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Benefits offered by this job

Medical plans
Paid time off
Paid holidays

Job summary

Micron Technology is leading memory and storage solutions with a focus on AI accelerators. This PhD internship on the HBM Architecture team focuses on researching and prototyping advanced memory and system architecture concepts for next-generation AI accelerators.

You will develop performance models and analyze AI workloads to optimize memory hierarchy and interconnects. You will collaborate with experienced architects and engineers, applying systems research methods to assess bandwidth,

Qualifications

  • Currently pursuing a PhD in a related technical field.
  • 0-2 years of experience in computer architecture or AI hardware.
  • Knowledge of memory system architecture (HBM, caches, DRAM).
  • Experience with performance modeling and architectural simulation.
  • Programming proficiency in Python or C++.
  • Strong analytical and communication skills.

Responsibilities

  • Research and evaluate memory and system architectures for AI accelerators.
  • Develop performance models for bandwidth, latency, and power.
  • Analyze AI training, inference and HPC workloads for bottlenecks.
  • Investigate memory hierarchy and interconnect optimizations.
  • Collaborate with cross-functional teams and AI/LLM tools in workflows.

Skills

Python
C++
Performance modeling
Memory systems
AI hardware
Analytical thinking
Technical communication

Education

PhD in Computer Architecture / EE / CE / CS

Tools

SystemC
GPU profiling tools
CUDA-based development
Emulation platforms

Job description

Micron Technology is leading memory and storage solutions with a focus on AI accelerators. This PhD internship on the HBM Architecture team focuses on researching and prototyping advanced memory and system architecture concepts for next-generation AI accelerators.

You will develop performance models and analyze AI workloads to optimize memory hierarchy and interconnects. You will collaborate with experienced architects and engineers, applying systems research methods to assess bandwidth,

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