Performance Modeling Architect - Cache & Coherent Fabrics

NVIDIA Corporation; United States; Presencial; USD 152.000 - 288.000; Tempo integral

Resumo da vaga

NVIDIA Corporation seeks a Performance Modeling Architect to define and improve CPU cache hierarchies and interconnects. You will build source-of-truth models that govern data movement across silicon, ensuring L3 and coherent fabrics meet ambitious performance goals.

You will model, analyze, and optimize cycle-accurate interconnects using C++/SystemC, Python for data processing, and work across automotive and data-center domains. A PhD/masters and 5+ years' experience are required.

Qualificações

• Master's or Ph.D. in Computer Engineering, Electrical Engineering, or Computer Science (or equivalent) with focus on architecture and 5+ years of experience.
• Strong understanding of CPU microarchitecture, memory consistency models, and cache coherency protocols.
• Proven experience in C++ or SystemC for cycle-accurate or functional modeling.
• Proficiency in Python or similar scripting languages for data processing, visualizations, and automation.
• Understanding of NoC topologies (Mesh, Ring, Torus), credit-based flow control, and arbitration logic.

Responsabilidades

• Develop and maintain high-fidelity, cycle-accurate performance models (C++/SystemC) for coherent interconnects and large-scale shared caches.
• Model and analyze performance bottlenecks across scales from automotive SoCs to large data center architectures.
• Evaluate performance impact of coherency protocols (CHI, ACE, or proprietary) and snooping filters.
• Run and analyze industry benchmarks (SPEC, MLPerf, automotive suites) to drive architectural trade-offs.
• Collaborate with build/verification to correlate models with silicon and work with software teams to optimize drivers.

Conhecimentos

C++

SystemC

Python

CPU microarchitecture

Memory consistency models

Cache coherency protocols

NoC topologies

Formação

Master's or PhD in Computer Engineering/ Electrical Engineering/ Computer Science

Descrição da vaga

NVIDIA Corporation seeks a Performance Modeling Architect to define and improve CPU cache hierarchies and interconnects. You will build source-of-truth models that govern data movement across silicon, ensuring L3 and coherent fabrics meet ambitious performance goals.

You will model, analyze, and optimize cycle-accurate interconnects using C++/SystemC, Python for data processing, and work across automotive and data-center domains. A PhD/masters and 5+ years' experience are required.