PCB Design Eng

Programming.com

San Jose (CA)

On-site

USD 120,000 - 180,000

Full time

14 days+

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Job summary

Programming.com is seeking a Mid-Senior level engineer to lead PCB and system-level development in a full-time role in San Jose, CA. You will review schematics, bring up PCBs, and validate boards against published plans, while debugging issues and documenting root causes.

You should have a Bachelor's in Electrical or Computer Engineering and 5+ years of hands-on experience with high-speed SerDes, PCIe, and FPGA/CPLD design.

Qualifications

  • Bachelor's degree in Electrical or Computer Engineering.
  • 5+ years PCB and system-level development experience.
  • Experience with lab bring up and design validation.
  • Knowledge of high-speed SerDes (>1G) interfaces.
  • Familiarity with PCIe, MDIO, SPI, I2C interfaces.
  • Experience with CPLDs and FPGAs.
  • Cadence Concept and Allegro experience.
  • Strong cross-disciplinary collaboration and communication.

Responsibilities

  • Perform schematic and board level reviews.
  • Bring up PCBs and systems using diagnostic software.
  • Perform unit level validation of boards and systems per guidelines and test plans.
  • Debug assigned issues and document root cause and corrective action.
  • Worked on at least 2 PCB designs.

Skills

PCB design
Lab bring-up
High-speed SerDes
FPGA/CPLD
X86 architecture
Signal integrity
Collaboration

Education

Bachelor's degree in Electrical or Computer Engineering

Tools

Cadence Concept
Cadence Allegro

Job description

Overview
Responsibilities
  • Perform schematic and board level reviews.
  • Bring up PCBs and systems using diagnostic software.
  • Perform unit level validation of boards and systems following published guideline and test plan.
  • Debug assigned issues and document root cause and corrective action.
  • Worked on at least 2 PCB designs.
Qualifications
  • Skills required:
  • Bachelors in Electrical or Computer Engineering
  • 5+ years’ experience in PCB and system level development preferably in the
  • Experience with lab bring up and design validation.
  • Knowledge of high speed SerDes (>1G) interfaces, high speed design and signal integrity principles
  • Knowledgeable in X86 architecture, and a very good understanding of control interfaces such as PCIe, MDIO, SPI, I2C
  • Knowledgeable with power delivery and distribution techniques
  • Knowledgeable with CPLDs and FPGAs
  • Hands on board design knowledge, familiar with design tools including Cadence Concept and Allegro
  • Experience collaborating with other disciplines, including Diagnostics software, mechanical, signal integrity, thermal, manufacturing.
  • Good communications skills and ability to collaborate in a team environment
Company and roles
  • Seniority level: Mid-Senior level
  • Employment type: Full-time
  • Job function: Engineering and Information Technology
  • Industries: IT Services and IT Consulting
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