Parametric Test Engineer, Texas Institute for Electronics

University of Texas at Austin; Austin (TX); On-site; USD 90,000 - 120,000; Full time

Benefits offered by this job

Competitive benefits

Tuition assistance

Staff training/LinkedIn Learning

Paid time off

Job summary

Parametric Test Engineer roles at the Texas Institute for Electronics at the University of Texas at Austin focus on developing and executing DC parametric test methodologies for semiconductor devices. Proficiency with SMUs, switch matrices, and wafer probing is required, along with strong data analysis and scripting skills in Python to automate data collection.

Senior roles demand additional years of experience and advanced degrees; the team emphasizes reliability, collaboration, and continuous

Qualifications

• Experience with DC parametric testing of semiconductor devices.
• Data analysis and scripting for test automation.
• Strong understanding of statistical methods (Gauge R&R, hypothesis testing).

Responsibilities

• Develop and implement DC parametric test procedures using SMUs, switch matrices, and wafer probing equipment.
• Collaborate with cross-functional teams to define test requirements and align with project goals.
• Analyze test data with Python to automate collection and processing.
• Apply gauge R&R, hypothesis testing, and regression analysis to assess accuracy and reliability.
• Troubleshoot and resolve issues with test equipment and procedures to maintain high-quality testing.
• Document methodologies, results, and analyses for knowledge sharing.

Skills

DC Parametric Testing

Python scripting

SMUs & Wafer Probing

Statistical Analysis

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

Tools

Wafer probing systems

Switch matrices

Job description

Job Posting Title:

Parametric Test Engineer, Texas Institute for Electronics

Hiring Department:

Texas Institute for Electronics

Position Open To:

All Applicants

Weekly Scheduled Hours:

40

FLSA Status:

To Be Determined at Offer

Earliest Start Date:

Ongoing

Position Duration:

Expected to Continue

Location:

MONTOPOLIS RESEARCH CENTER

Job Details: General Notes

Applicants must be eligible to work in the United States on a full-time basis for any employer without sponsorship.

About Us

The Texas Institute for Electronics (TIE)is a University of Texas at Austin-supported semiconductor consortium of state and local government, preeminent defense electronics and semiconductor companies, national labs and nationally recognized academic institutions. Our mission is to develop and execute a state-of-the-art 3D Heterogenous Integration manufacturing technology roadmap, and to provide critical pilot manufacturing capabilities to address national security needs and catalyze domestic economic growth.

Join the Texas Institute for Electronics (TIE) and help us push the boundaries in critical semiconductor domains, including advanced packaging, with the aim of reestablishing U.S. prominence in semiconductor manufacturing.

With over $1 billion in funding from the US DoD and the state of Texas, we'reat the forefront of creating cutting-edge semiconductor manufacturing equipment and processes that will set the course for future advancements in semiconductor logic, memory, heterogeneous integration, chip cooling and more. Situated in the heart of Austin - named "America's Coolest City" by Expedia and "The Best Place to Live in the U.S." by U.S. News and World Report - the Texas Institute for Electronics embodies the city's innovative spirit.

UT Austin, recognized by Forbes as one of America's Best Large Employers, provides outstanding employee benefits and total rewards packages that include:

• Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
• Voluntary Vision, Dental, Life, and Disability insurance options
• Generous paid vacation, sick time, and holidays
• Teachers Retirement System of Texas, a defined benefit retirement plan, with 8.25% employer matching funds
• Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
• Flexible spending account options for medical and childcare expenses
• Robust free training access through LinkedIn Learning plus professional conference opportunities
• Tuition assistance
• Expansive employee discount program including athletic tickets
• Free access to UT Austin's libraries and museums with staff ID card
• Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card
• For more details, please see: Benefits | Human Resources and UT Austin Employee Experience | Human Resources

Purpose

The DC Parametric Test Engineer/Senior Parametric Test Engineer will be responsible for developing and executing test methodologies to evaluate semiconductor devices' electrical parameters. This role involves working with Source Measure Units (SMUs), switch matrices, and wafer probing systems to ensure accurate and efficient testing processes. The ideal candidate will have a strong background in data analysis, scripting, and statistical methods to interpret test results and drive continuous improvement.

Responsibilities

• Develop and implement DC parametric test procedures for semiconductor devices using SMUs, switch matrices, and wafer probing equipment.
• Collaborate with cross-functional teams to define test requirements and ensure alignment with project objectives.
• Perform data analysis on test results, utilizing scripting languages such as Python to automate data collection and processing.
• Apply statistical analysis techniques, including gauge Repeatability and Reproducibility (R&R), hypothesis testing, and regression analysis, to assess test accuracy and reliability.
• Troubleshoot and resolve issues related to test equipment and procedures to maintain high-quality testing standards.
• Document test methodologies, results, and analysis to support knowledge sharing and continuous improvement initiatives.
• Other related functions as assigned.

Required Qualifications

Parametric Test Engineer:

• Bachelor's degree in electrical engineering, electronics, or a related field and at least four years of proven experience in DC parametric testing within the semiconductor industry.

Senior Parametric Test Engineer:

• Master's degree in electrical engineering, electronics, or a related field and at least six years of proven experience in DC parametric testing within the semiconductor industry.

For all levels:

• Proficiency in operating SMUs, switch matrices, and wafer probing systems.
• Strong data analysis skills, with experience in scripting languages such as Python or similar.
• Solid understanding of statistical analysis methods, including gauge R&R, hypothesis testing, and regression analysis.
• Excellent problem-solving abilities and attention to detail.
• Strong communication skills, with the ability to work effectively in a collaborative team environment.

Preferred Qualifications

• Master's degree or higher in electrical engineering, electronics, or a related field.
• More than six years of proven experience in DC parametric testing within the semiconductor industry
• Database experience.
• Familiarity with semiconductor device physics and fabrication processes.
• Knowledge of data visualization tools and techniques.

Salary Range

TIE Pays Industry Competitive Salaries

Working Conditions

• Uniforms and/or personal protection equipment (furnished)
• May work around standard office conditions
• May work around electrical and mechanical hazards
• Repetitive use of a keyboard at a workstation
• Use of manual dexterity (ex: using a mouse)

Required Materials

• Resume/CV
• 3 work references with their contact information; at least one reference should be from a supervisor

Employment Eligibility

Regular staff who have been employed in their current position for the last six continuous months are eligible for openings being recruited for through University-Wide or Open Recruiting, to include both promotional opportunities and lateral transfers. Staff who are promotion/transfer eligible may apply for positions without supervisor approval.

Retirement Plan Eligibility

The retirement plan for this position is Teacher Retirement System of Texas (TRS), subject to the position being at least 20 hours per week and at least 135 days in length. This position may have the option to elect the Optional Retirement Program (ORP) instead of TRS, dependent upon the job profile you qualify for, and subject to the position being 40 hours per week and at least 135 days in length.

Background Checks

A criminal history background check will be required for finalist(s) under consideration for this position.

Equal Opportunity Employer

The University of Texas at Austin, as an equal opportunity/affirmative action employer,complies with all applicable federal and state laws regarding nondiscrimination and affirmative action. The University is committed to a policy of equal opportunity for all persons and does not discriminate on the basis of race, color, national origin, age, marital status, sex, sexual orientation, gender identity, gender expression, disability, religion, or veteran status in employment, educational programs and activities, and admissions.

Pay Transparency

The University of Texas at Austin will not discharge or in any other manner discriminate against employees or applicants because they have inquired about, discussed, or disclosed their own pay or the pay of another employee or applicant. However, employees who have access to the compensation information of other employees or applicants as a part of their essential job functions cannot disclose the pay of other employees or applicants to individuals who do not otherwise have access to compensation information, unless the disclosure is (a) in response to a formal complaint or charge, (b) in furtherance of an investigation, proceeding, hearing, or action, including an investigation conducted by the employer, or (c) consistent with the contractor's legal duty to furnish information.

Employment Eligibility Verification

If hired, you will be required to complete the federal Employment Eligibility Verification I-9 form. You will be required to present acceptable and original documents to prove your identity and authorization to work in the United States. Documents need to be presented no later than the third day of employment. Failure to do so will result in loss of employment at the university.

E-Verify

The University of Texas at Austin use E-Verify to check the work authorization of all new hires effective May 2015. The university's company ID number for purposes of E-Verify is 854197. For more information about E-Verify, please see the following:

• E-Verify Poster (English and Spanish) [PDF]
• Right to Work Poster (English) [PDF]
• Right to Work Poster (Spanish) [PDF]

Compliance

Employees may be required to report violations of law under Title IX and the Jeanne Clery Disclosure of Campus Security Policy and Crime Statistics Act (Clery Act). If this position is identified a Campus Security Authority (Clery Act), you will be notified and provided resources for reporting. Responsible employees under Title IX are defined and outlined in HOP-3031.

The Clery Act requires all prospective employees be notified of the availability of the Annual Security and Fire Safety report. You may access the most recent report here or obtain a copy at University Compliance Services, 1616 Guadalupe Street, UTA 2.206, Austin, Texas 78701.