Package Design Methodology Engineer

Jobtailor; California (MO); On-site; USD 120,000 - 180,000; Full time

Job summary

Jobtailor is seeking a senior engineer to design and implement VLSI tool flows for silicon and substrate design. You will build maintainable applications that empower project engineers to work efficiently at scale.

You will collaborate with world-class engineers on AI/ML-enabled engineering workflows, optimize design validation, and advance packaging design methodologies across silicon environments. A strong EE foundation and proven Python/C++ skills are essential.

Qualifications

• BS in Computer Science or Electrical Engineering (or equivalent experience).
• 5+ years developing flows/methodologies for package design at scale.
• Strong programming fundamentals in Python and C++.
• Experience applying AI/ML to engineering workflows.
• Solid understanding of EE fundamentals for VLSI package design.

Responsibilities

• Design and implement VLSI tools for silicon and substrate design with engineers.
• Develop applications to enable project engineers with maintainability and ease of use.
• Develop flows/tools and methodologies to construct, analyze, and validate package designs.
• Optimize daily workflows of top package designers.

Skills

Flow Development

Methodology Development

Python Programming

C++ Programming

AI/ML Application

Electrical Engineering Fundamentals

Package Design Validation

Workflow Optimization

Application Development

Maintainability Focus

Education

BS in Computer Science

BS in Electrical Engineering

Job description

• Work with world-class engineers to design and implement VLSI tools for silicon and substrate design
• Develop applications to enable project engineers with an emphasis on maintainability and ease of use
• Develop flows/tools and methodologies to construct, analyze, and validate package designs
• Optimize the daily workflows of the world's top package designers

Requirements

• BS in Computer Science, Electrical Engineering, or a related field (or equivalent experience)
• 5+ years of flow and methodology development experience building flows for package design used by engineering teams at scale
• Good programming fundamentals in Python and/or C++
• Demonstrated experience applying AI/ML techniques in engineering workflows
• Strong understanding of electrical engineering fundamentals relevant to VLSI package design

Core Competencies

Expertise in VLSI tools and methodologies for package design, with a strong foundation in Python and C++. Proven ability to apply AI/ML techniques to enhance engineering workflows and optimize design processes.

Highest-signal resume keywords

• VLSI Package Design
• Flow Development
• Python Programming
• C++ Programming
• AI/ML Techniques

ATS Optimization Keywords

Hard Skills

• Flow Development
• Methodology Development
• Python Programming
• C++ Programming
• AI/ML Application
• Electrical Engineering Fundamentals
• Package Design Validation
• Workflow Optimization
• Application Development
• Maintainability Focus

Certifications & Qualifications

• BS in Computer Science
• BS in Electrical Engineering

Industry Keywords

• VLSI
• Silicon Design
• Substrate Design
• Engineering Workflows
• Package Design