Package Design Engineer - Staff

Qualcomm

San Diego (CA)

On-site

USD 160,000 - 240,000

Full time

11 days ago

Get a reply from this employer

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Job summary

Qualcomm Technologies, Inc. seeks an IC Package Design Engineer to own advanced package selection, SiP feasibility, and physical design across SoCs.

You will coordinate with multi-functional teams to optimize mechanical, electrical, and thermal performance, and drive verification and automation strategies for efficient package release. Applicants should have a Master’s degree with 5+ years in electrical/mechanical/materials engineering, proficiency with Cadence APD/SiP and xPD, and hands-on

Qualifications

  • Master's degree in electrical engineering, mechanical engineering, materials science, or related fields (5+ years).
  • Proven fundamentals in electrical, material, thermal, or mechanical engineering fields.
  • Experience with sophisticated package configurations (Flip Chip BGA, 2.5D/3D Interposer).

Responsibilities

  • Own and drive advanced package selection, new generation product package structure, and configuration optimization.
  • Responsible for package/SIP physical design and layout, optimization, DV, and tape out.
  • Collaborate with multi-functional teams to optimize mechanical, electrical, and thermal performance for various chips.
  • Define and develop design verification and automation strategy to strengthen package design and release flows.
  • Optimize package pin-out and ensure SI/PI compliance.
  • Drive innovations in package design with vendors and developers; develop CAD tools and verification flows.

Skills

Cadence APD/SiP
Package design
DFM/DFX rules
Electrical/EM theory
SI/PI concepts

Education

Master's degree in electrical/mechanical/materials or related

Tools

Cadence Allegro
xPD/SiP tooling
Calibre
XtractIM
HFSS
Q3D
PowerSI

Job description

Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > Packaging EngineeringGeneral Summary:Qualcomm Data Center team is developing High performance, Energy efficient server solution for data center applications. We are looking for highly talented, innovative, teamwork-oriented individuals for our cutting-edge technology work!Role and Responsibilities:Own and drive advanced package selection, new generation product package structure, and configuration optimization.Responsible for Package/SIP physical design and layout, optimization, DV, and tape out.Work with multi-functional teams to achieve optimized mechanical, electrical, and thermal performance for various types of chips.Implement the physical design of packages and modules for SoC.Interface and coordinate with multi-functional groups throughout Qualcomm on new product package/SiP feasibility analysis, design, and selection.Define and develop design verification and automation strategy to strengthen and streamline package design and release flows.Work multi-functionally to optimize package pin out.Ensure package design is optimized with SI/PI requirements.Drive methodology, innovations, and efficiency improvements in package design together with vendors and developers on feature development and bug resolution.Explore, evaluate, and develop new CAD tools, design, and verification flow.Partner with BU PD team to optimize chip Floorplan and bump placement and optimize the package size.Skills:As the IC Package Design Engineer, you demonstrate fundamental knowledge or proven experience in the following:Proficient in Cadence APD & SiP and/or Siemens Xpedition Package Designer (xPD) .Familiar in using Constraint Manager in Package design tool for setting up DFM rules and electrical rulesExperience in using in-line DRC checking, DFM verification, Electrical Rule Checking (ERC) preferred.Basic knowledge in signal-integrity for high-speed IO interfaces, transmission line & electromagnetic field theory.Knowledge of IC packaging structures, chip-package, and package-board interaction.Basic knowledge of electronic packaging process and typical failure modes preferred.Preferred Qualifications:Master's degree in electrical engineering, mechanical engineering, material science, or related fields with 5+ years of experience.Proven fundamentals in electrical, material, thermal, or mechanical engineering fields.Familiarity with various sophisticated package configurations and assembly/substrate technology (Flip chip BGA, 2.5D/3D Interposer, etc.).Experience in package design and proficiency in Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP).Basic understanding of some SI/PI tools (XtractIM, PowerSI, HFSS, Q3D, etc.), package model extraction, S-parameters, and RLGC model.Basic knowledge of substrate manufacturing process, structure, design rules, and material properties.Proven understanding of high-speed interfaces, including DDR, PCIe, UCIE, etc.Experience with Calibre tool and package design reviews.Knowledge of high-speed layout constraints (crosstalk mitigation, differential pairs).Solid understanding of Design Rules Check and Design for Manufacturing.Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.Pay range and Other Compensation & Benefits :$160,200.00 - $240,200.00The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link .If you would like more information about this role, please contact Qualcomm Careers .
Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Package Design Engineer - Staff
Package Design Engineer - Staff

Qualcomm Incorporated • San Diego (CA)

On-site
USD 160,000 - 240,000
Package Design Engineer - Staff San Diego, California, United States of America Packaging Engineering Posted a day ago
Package Design Engineer - Staff San Diego, California, United States of America Packaging Engineering Posted a day ago

QUALCOMM, Inc. • San Diego (CA)

On-site
USD 160,000 - 240,000
Annual bonus
RSU grants
Benefits package
Package Design Engineer - Staff Santa Clara, California, United States of America + 1 more Pack[...]
Package Design Engineer - Staff Santa Clara, California, United States of America + 1 more Pack[...]

Qualcomm • Santa Clara (CA)

On-site
USD 154,000 - 252,800
SIPI Engineer, Sr.
SIPI Engineer, Sr.

Qualcomm • San Diego (CA)

On-site
USD 134,000 - 201,000
Discretionary bonus program
RSU grants
Packaging SIPI Engineer, Principal Engineer
Packaging SIPI Engineer, Principal Engineer

QUALCOMM, Inc. • San Diego (CA)

On-site
USD 210,000 - 315,000
Package Design Engineer – Principal Engineer
Package Design Engineer – Principal Engineer

QUALCOMM, Inc. • San Diego (CA)

On-site
USD 210,000 - 315,000
Staff IC Packaging Engineer - Mechanical Simulation
Staff IC Packaging Engineer - Mechanical Simulation

QUALCOMM, Inc. • San Diego (CA)

On-site
USD 160,000 - 240,000
Packaging SIPI Engineer, Principal Engineer
Packaging SIPI Engineer, Principal Engineer

Qualcomm • San Diego (CA)

On-site
USD 202,000 - 302,000
Packaging SIPI Engineer, Principal Engineer San Diego, California, United States of America Packaging Engineering
Packaging SIPI Engineer, Principal Engineer San Diego, California, United States of America Packaging Engineering

Qualcomm • San Diego (CA)

On-site
USD 202,000 - 302,000
Package Design Engineer – Principal Engineer
Package Design Engineer – Principal Engineer

Qualcomm Incorporated • San Diego (CA)

On-site
USD 210,000 - 315,000