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Texas Instruments is seeking a Resolution Enhancement Techniques (RET) OPC Verification Engineer in Dallas to architect and implement OP CV-recipe code for advanced lithography processes across 45/28/22/20 nm nodes. You will collaborate with designers, fab engineers, and lithography teams to predict hotspots and minimize false positives.
The role requires a Master’s in a relevant field and 5+ years in semiconductor photolithography/RET development, with strong analytical skills and the ability
Texas Instruments is seeking a Resolution Enhancement Techniques (RET) OPC Verification Engineer in Dallas to architect and implement OP CV-recipe code for advanced lithography processes across 45/28/22/20 nm nodes. You will collaborate with designers, fab engineers, and lithography teams to predict hotspots and minimize false positives.
The role requires a Master’s in a relevant field and 5+ years in semiconductor photolithography/RET development, with strong analytical skills and the ability