OPC Verification Engineer

Texas Instruments; Dallas (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Texas Instruments is seeking a Resolution Enhancement Techniques (RET) OPC Verification Engineer in Dallas to architect and implement OP CV-recipe code for advanced lithography processes across 45/28/22/20 nm nodes. You will collaborate with designers, fab engineers, and lithography teams to predict hotspots and minimize false positives.

The role requires a Master’s in a relevant field and 5+ years in semiconductor photolithography/RET development, with strong analytical skills and the ability

Qualifications

• Master's degree in Electrical Engineering, Physics, Computer Science, Chemistry or related field.
• 5+ years' experience in semiconductor photolithography or RET development.
• Lithography and RET expertise for 45 nm, 28 nm, 22 nm and 20 nm technology nodes.

Responsibilities

• Understand lithography requirements for RET with designers and fab engineers.
• Translate lithography requirements into an OPC Verification-recipe implementation plan.
• Write OPCV-recipe code and optimize parameters for hotspot prediction and reduced false errors.
• Create test cases for OPCV-recipe code.
• Review large RET-output layouts for quality and interfaces with lithography/yield teams.

Skills

Analytical skills

Problem solving

Verbal and written communication

Team collaboration

Time management

Initiative

Relationship building

Education

Master's degree in Electrical Engineering or related field

Tools

Git

OASIS

GDSII

RET tooling experience

OPCV/OPC Verification skills

Job description

About the job

As a Resolution Enhancement Techniques (RET) OPC Verification Engineer, you'll architect new TI products and make our customers' visions a reality. You'll define, design, model, implement, and document analog, digital, and RF integrated circuits (ICs). Responsibilities will include, but are not limited to:

• Working with designers and fab engineers to understand lithography requirements for RET.
• Translating lithography requirements into an implementation plan for OPC Verification-recipe code.
• Writing OPCV-recipe code.
• Optimizing OPCV-recipe parameters for hotspot prediction and minimizing false errors.
• Creating test cases for OPCV-recipe code.
• Reviewing large RET-output layouts for quality.
• Interfacing with lithography and yield enhancement teams.

Why TI?

• Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics.
• We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/pages/4012)
• Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. Please find our country-specific benefits here (https://careers.ti.com/en/sites/CX/pages/benefits)

About Texas Instruments

Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, data center, personal electronics and communications equipment. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com .

Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws.

Minimum requirements:

• Master's degree in Electrical Engineering, Physics, Computer Science, Chemistry or related field.
• 5+ years' experience in semiconductor photolithography or RET development.
• Lithography and RET expertise for the 45 nm, 28 nm, 22 nm and 20 nm technology nodes.
• Strong knowledge/understanding of advanced lithography processes, lithography simulation techniques, mask making and RET techniques used in semiconductor manufacturing and process development.

Preferred qualifications:

• Experience with PLRC and ORC.
• Familiarity with physical layout (OASIS, GDSII): viewing, measuring and manipulating it.
• Experience with code-version control, eg, Git.
• Demonstrated strong analytical and problem solving skills.
• Strong verbal and written communication skills.
• Ability to work in teams and collaborate effectively with people in different functions.
• Strong time management skills that enable on-time project delivery.
• Demonstrated ability to build strong, influential relationships.
• Ability to work effectively in a fast-paced and rapidly changing environment.
• Ability to take the initiative and drive for results.

ECL/GTC Required:

Yes