Onsite Electrical Design & Verification Engineer

MassGenics, Inc.; El Segundo (CA); On-site; USD 124,000 - 138,000; Full time

Benefits offered by this job

Medical & pharmacy coverage

Dental/vision insurance

401(k)

Health saving account (HSA)

Flexible spending account (FSA)

Life Insurance

Pet Insurance

Short term and Long term Disability

Accident & Critical illness coverage

Pre-paid legal & ID theft protection

Sick time

other types of paid leaves

Employee Assistance Program (EAP)

Job summary

Innova Solutions in El Segundo, CA is seeking an Electrical Design Engineer to support civil, electrical and mechanical engineering programs. The role requires working onsite to resolve complex issues across architecture, requirements and design, while leading technical aspects of proposals and collaborating across teams.

The ideal candidate has extensive SystemVerilog and UVM experience, security clearance, and a track record in verification testing and validation.

Qualifications

• Active U.S. security clearance.
• 7+ years of verification with UVM experience; 5+ years acceptable if solid.
• Strong SystemVerilog and UVM experience.
• Debugging; coverage closure.
• Experience in verification testing.
• Experience in VERIFICATION AND VALIDATION.
• Experience in Debugging.

Responsibilities

• Resolve complex issues on critical programs from architecture to design.
• Lead technical aspects of proposal preparation.
• Identify critical performance measures and develop methods to compute them.
• Coordinate engineering support throughout the product lifecycle.
• Develop new concepts for future product designs to meet projected requirements.
• Recommend and manage technology insertion.

Skills

SystemVerilog

UVM

Security clearance

Verification testing

Debugging

Job description

Innova Solutions in El Segundo, CA is seeking an Electrical Design Engineer to support civil, electrical and mechanical engineering programs. The role requires working onsite to resolve complex issues across architecture, requirements and design, while leading technical aspects of proposals and collaborating across teams.

The ideal candidate has extensive SystemVerilog and UVM experience, security clearance, and a track record in verification testing and validation.