MTS - HIG HBM - ARCHITECTURE

Micron Technology, Inc; Richardson (TX); On-site; USD 150,000 - 210,000; Full time

Job summary

Micron Technology, Inc. in Richardson, TX, is seeking an HBM IO Design Architecture Engineer to own the end-to-end design quality system for high bandwidth memory products.

You will define quality processes from architecture to silicon, analyze silicon measurements and simulations, and drive AI-driven analytics to accelerate fault isolation and design improvements. This position requires hands-on experience in high-speed IO, clocking design at 32 Gbps+, and cross-functional collaboration across

Qualifications

• Hands-on experience in high-speed IO design and verification.
• Experience with clocking design and parasitic extraction.
• Familiarity with off-chip protocols (UCIe, HBM, DDR, PCIe, MIPI).
• Ability to analyze silicon measurements and simulations along with cross‑functional collaboration.

Responsibilities

• High-speed IO design architecture for HBM products.
• Define and standardize IO design quality process from architecture to silicon.
• Correlate silicon measurements and simulations for circuit level design analysis.
• Contribute to cross-group communication for standardization and success.
• Solicit input from CAD, modeling, and verification groups to ensure design quality.
• Drive innovation into future memory generations with AI‑assisted analytics.

Skills

High-speed IO design

Clocking design 32Gbps+

Circuit verification & optimization

HBM/DDR/PCIe/MIPI knowledge

Documentation & communication

Circuit debugging

Packaging environments (CoWoS, HBM)

Education

MS or PhD in EE

Job description

Req ID: JR111358 MTS - HIG HBM - ARCHITECTURE

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

The High-Performance Integrated Group (HIG) is a division within the Technology and Products Group (TPG). We are dedicated to developing and optimizing High Bandwidth Memory (HBM) solutions for AI and ML applications! Our ultimate goal is to deliver the lowest power per bit solutions in the industry!

Position Overview

We are searching for an HBM IO Design Architecture Engineer to build and own the end-to-end design quality system — including design checklist delivery, silicon data analysis, and cross-team data collection framework — ensuring that silicon learnings are systematically captured and fed back into the project before the next generation design is finalized.

The ideal candidate brings hands‑on experience in design execution, simulation to silicon correlation, and cross‑functional methodology development, and embraces AI‑driven analysis and data‑driven decision making to accelerate quality improvement cycles.

Responsibilities

• High-speed IO design architecture for HBM products
• Define and standardize IO design quality process from architecture to silicon
• Work with Product Engineering to correlate silicon measurements and simulation performance for circuit level design analysis
• Contribute to cross group communication to work towards standardization and group success
• Proactively solicit input from Standards, CAD, modeling, and verification groups to ensure the design quality
• Drive innovation into the future Memory generation with multifaceted work environment
• Leverage AI Assisted analytics to accelerate root cause identification from complex multi-variable silicon data

Successful candidates for this position will have

• Prior industrial experience in high-speed clocking design at 32Gbps+ speed
• Good IO circuit design background with familiarity of both, analog and digital design and simulation experience required
• Experience with circuit verification and optimization including layout verification and parasitic extractions of the circuits
• Familiar with one or more off-chip protocols such as UCIe, HBM, DDR, PCIe, MIPI, etc
• Good understanding on state-of-the-arts device characteristics and hands‑on design experience
• Excellent problem-solving and analytical skills
• Strong documentation skills
• Strong communication skills with the ability to clearly convey sophisticated technical concepts to other design peers both verbally and written
• Prior circuit debug experience through Product Engineering or equivalent preferred
• Knowledge of advanced packaging environments (CoWoS, HBM stack, D2D, etc)

Required Experience

• MS or PhD in EE
• 10+ years of relevant Engineering or Design Engineering experience on high-speed IO, PLL, Tx, Rx, Equalization, clock tree

Job title and level can scale depending on experience and qualifications

Job Profile(s)

Systems Design Engineering MTS - Systems Design Engineering SMTS

Relocation Level: TBD

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.