Mixed-Signal Modeling & Verification Intern

Cirrus Logic; Austin (TX); Hybrid; USD 34,000 - 48,000; Full time

Benefits offered by this job

Hybrid in-office schedule

Job summary

Cirrus Logic is seeking a creative and hardworking engineering intern to join the Analog/Mixed-Signal Verification, Modeling and Methodology Team. You will develop SystemVerilog models and collaborate with design teams to enable tops-down design methodology.

The internship runs Fall 2026 for 12–14 weeks on a full-time schedule. You will work with chip and DV leads on AMS/UVM verification and gain hands-on experience in a fast-paced environment.

Qualifications

• Actively pursuing a Bachelor's, Master's, or PhD in Electrical Engineering or Computer Engineering.
• Good understanding of analog integrated circuit design.
• Experience with SystemVerilog RNM modeling and/or Verilog-A behavioral modeling.
• Organized and detailed with strong communication skills.
• Possess outstanding analytical and problem-solving skills.
• Results-oriented and ability to operate in dynamic environment.

Responsibilities

• Contribute to verification planning and AMS simulation on full custom ASICs for audio processing.
• Develop behavioral models using SystemVerilog RNM and Verilog-A modeling.
• Interpret analog circuit schematics into abstract models.
• Perform regression debug support and flow/infrastructure development.

Skills

SystemVerilog RNM

Verilog-A modeling

Analog IC design

Communication skills

Analytical thinking

Dynamic environment adaptability

Education

Pursuing a Bachelor's, Master's, or PhD in Electrical Engineering or Computer Engineering

Tools

SystemVerilog

RNM modeling

Job description

Cirrus Logic is seeking a creative and hardworking engineering intern to join the Analog/Mixed-Signal Verification, Modeling and Methodology Team. You will develop SystemVerilog models and collaborate with design teams to enable tops-down design methodology.

The internship runs Fall 2026 for 12–14 weeks on a full-time schedule. You will work with chip and DV leads on AMS/UVM verification and gain hands-on experience in a fast-paced environment.